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Searched refs:_refdiv (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/clk/visconti/
H A Dpll.h25 _refdiv, _intin, _fracin, _postdiv1, _postdiv2) \ argument
30 .refdiv = _refdiv, \
/openbmc/u-boot/drivers/clk/rockchip/
H A Dclk_rk3036.c31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
32 .refdiv = _refdiv,\
33 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
35 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) *\
36 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz,\
H A Dclk_rk322x.c28 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
29 .refdiv = _refdiv,\
30 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ), \
32 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) * \
33 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz, \
H A Dclk_rv1108.c31 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
32 .refdiv = _refdiv,\
33 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
35 _Static_assert(((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ) *\
36 OSC_HZ / (_refdiv * _postdiv1 * _postdiv2) == hz,\
H A Dclk_rk3128.c29 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
30 .refdiv = _refdiv,\
31 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
H A Dclk_rk3328.c32 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
33 .refdiv = _refdiv,\
34 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
H A Dclk_rk3399.c44 #define PLL_DIVISORS(hz, _refdiv, _postdiv1, _postdiv2) {\ argument
45 .refdiv = _refdiv,\
46 .fbdiv = (u32)((u64)hz * _refdiv * _postdiv1 * _postdiv2 / OSC_HZ),\
/openbmc/linux/drivers/clk/rockchip/
H A Dclk.h292 #define RK3036_PLL_RATE(_rate, _refdiv, _fbdiv, _postdiv1, \ argument
298 .refdiv = _refdiv, \