Home
last modified time | relevance | path

Searched refs:_PORT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/include/media/
H A Dipu-bridge.h32 #define NODE_PORT(_PORT, _SENSOR_NODE) \ argument
34 .name = _PORT, \
38 #define NODE_ENDPOINT(_EP, _PORT, _PROPS) \ argument
41 .parent = _PORT, \
/openbmc/linux/drivers/gpu/drm/i915/display/
H A Dintel_display_reg_defs.h21 #define _PORT(port, a, b) _PICK_EVEN(port, a, b) macro
28 #define _MMIO_PORT(port, a, b) _MMIO(_PORT(port, a, b))
H A Dintel_dp_aux_regs.h23 #define DP_AUX_CH_DATA(aux_ch, i) _MMIO(_PORT(aux_ch, _DPA_AUX_CH_DATA1, _DPB_AUX_CH_DATA1) + (i) *…
H A Dintel_dkl_phy_regs.h29 #define _DKL_REG_PHY_BASE(tc_port) _PORT(tc_port, \
H A Dintel_mg_phy_regs.h12 _MMIO(_PORT(tc_port, ln0p1, ln0p2) + (ln) * ((ln1p1) - (ln0p1)))
/openbmc/linux/drivers/gpu/drm/i915/
H A Di915_reg.h266 #define VLV_PCS_DW0(ch) _PORT(ch, _VLV_PCS_DW0_CH0, _VLV_PCS_DW0_CH1)
272 #define VLV_PCS01_DW0(ch) _PORT(ch, _VLV_PCS01_DW0_CH0, _VLV_PCS01_DW0_CH1)
273 #define VLV_PCS23_DW0(ch) _PORT(ch, _VLV_PCS23_DW0_CH0, _VLV_PCS23_DW0_CH1)
282 #define VLV_PCS_DW1(ch) _PORT(ch, _VLV_PCS_DW1_CH0, _VLV_PCS_DW1_CH1)
288 #define VLV_PCS01_DW1(ch) _PORT(ch, _VLV_PCS01_DW1_CH0, _VLV_PCS01_DW1_CH1)
289 #define VLV_PCS23_DW1(ch) _PORT(ch, _VLV_PCS23_DW1_CH0, _VLV_PCS23_DW1_CH1)
295 #define VLV_PCS_DW8(ch) _PORT(ch, _VLV_PCS_DW8_CH0, _VLV_PCS_DW8_CH1)
301 #define VLV_PCS01_DW8(port) _PORT(port, _VLV_PCS01_DW8_CH0, _VLV_PCS01_DW8_CH1)
302 #define VLV_PCS23_DW8(port) _PORT(port, _VLV_PCS23_DW8_CH0, _VLV_PCS23_DW8_CH1)
312 #define VLV_PCS_DW9(ch) _PORT(ch, _VLV_PCS_DW9_CH0, _VLV_PCS_DW9_CH1)
[all …]
/openbmc/u-boot/doc/
H A DREADME.bus_vcxk59 CONFIG_SYS_VCXK_<xxxx>_PORT
/openbmc/linux/drivers/pinctrl/renesas/
H A Dpfc-r8a7740.c33 IRQ##irq##_PORT##pin##_MARK, \