Searched refs:_CHV_CMN_DW1_CH1 (Results 1 – 2 of 2) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/i915/display/ |
| H A D | intel_dpio_phy.c | 862 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1); in chv_phy_pre_pll_enable()
868 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW1_CH1, val); in chv_phy_pre_pll_enable()
1011 val = vlv_dpio_read(dev_priv, pipe, _CHV_CMN_DW1_CH1); in chv_phy_post_pll_disable()
1013 vlv_dpio_write(dev_priv, pipe, _CHV_CMN_DW1_CH1, val); in chv_phy_post_pll_disable()
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| /openbmc/linux/drivers/gpu/drm/i915/ |
| H A D | i915_reg.h | 490 #define _CHV_CMN_DW1_CH1 0x8084 macro
501 #define CHV_CMN_DW14(ch) _PIPE(ch, _CHV_CMN_DW14_CH0, _CHV_CMN_DW1_CH1)
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