Searched refs:XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL (Results 1 – 3 of 3) sorted by relevance
30 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL (1 << 4) macro189 XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL; in pcie_phy_enable()
38 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL (1 << 4) macro571 XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL; in pcie_phy_power_on()
62 #define XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL (1 << 4) macro1098 XUSB_PADCTL_IOPHY_PLL_P0_CTL2_TXCLKREF_SEL; in tegra124_pcie_phy_power_on()