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Searched refs:XOR (Results 1 – 25 of 65) sorted by relevance

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/openbmc/linux/arch/loongarch/lib/
H A Dxor_simd.c23 #define XOR(dj, k) "vxor.v $vr" #dj ", $vr" #dj ", $vr" #k "\n\t" macro
36 XOR(0, 4) \
37 XOR(1, 5) \
38 XOR(2, 6) \
39 XOR(3, 7)
52 #undef XOR
66 #define XOR(dj, k) "xvxor.v $xr" #dj ", $xr" #dj ", $xr" #k "\n\t" macro
75 XOR(0, 2) \
76 XOR(1, 3)
87 #undef XOR
/openbmc/linux/arch/powerpc/lib/
H A Dxor_vmx.c44 #define XOR(V1, V2) \ macro
63 XOR(v1, v2); in __xor_altivec_2()
85 XOR(v1, v2); in __xor_altivec_3()
86 XOR(v1, v3); in __xor_altivec_3()
112 XOR(v1, v2); in __xor_altivec_4()
113 XOR(v3, v4); in __xor_altivec_4()
114 XOR(v1, v3); in __xor_altivec_4()
144 XOR(v1, v2); in __xor_altivec_5()
145 XOR(v3, v4); in __xor_altivec_5()
146 XOR(v1, v5); in __xor_altivec_5()
[all …]
/openbmc/linux/Documentation/devicetree/bindings/dma/
H A Dmv-xor.txt1 * Marvell XOR engines
10 registers for the XOR engine.
13 The DT node must also contains sub-nodes for each XOR channel that the
14 XOR engine has. Those sub-nodes have the following required
16 - interrupts: interrupt of the XOR channel
20 - dmacap,memcpy to indicate that the XOR channel is capable of memcpy operations
21 - dmacap,memset to indicate that the XOR channel is capable of memset operations
22 - dmacap,xor to indicate that the XOR channel is capable of xor operations
23 - dmacap,interrupt to indicate that the XOR channel is capable of
H A Dmv-xor-v2.txt1 * Marvell XOR v2 engines
14 - clocks: Optional reference to the clocks used by the XOR engine.
/openbmc/linux/lib/raid6/
H A Ds390vx.uc52 static inline void XOR(int x, int y, int z)
93 p = dptr[z0 + 1]; /* XOR parity */
103 XOR(8+$$,8+$$,16+$$);
105 XOR(0+$$,0+$$,16+$$);
106 XOR(8+$$,8+$$,16+$$);
123 p = dptr[disks - 2]; /* XOR parity */
137 XOR(8+$$,8+$$,16+$$);
139 XOR(0+$$,0+$$,16+$$);
140 XOR(8+$$,8+$$,16+$$);
147 XOR(8+$$,8+$$,16+$$);
[all …]
H A Daltivec.uc81 p = dptr[z0+1]; /* XOR parity */
126 NULL, /* XOR not yet implemented */
H A Dint.uc91 p = dptr[z0+1]; /* XOR parity */
120 p = dptr[disks-2]; /* XOR parity */
H A Dneon.uc67 p = dptr[z0+1]; /* XOR parity */
98 p = dptr[disks-2]; /* XOR parity */
H A Dvpermxor.uc52 p = dptr[z0+1]; /* XOR parity */
/openbmc/linux/Documentation/devicetree/bindings/clock/
H A Dmvebu-gated-clock.txt45 22 xor0 XOR DMA 0
46 23 xor1 XOR DMA 0
75 22 xor0 XOR 0
78 28 xor1 XOR 1
92 22 xor0 XOR 0
93 28 xor1 XOR 1
115 22 xor0 XOR DMA 0
118 28 xor1 XOR DMA 1
130 22 xor0 XOR DMA 0
150 23 xor0 XOR DMA 0
[all …]
/openbmc/linux/Documentation/devicetree/bindings/powerpc/4xx/
H A Dppc440spe-adma.txt1 PPC440SPe DMA/XOR (DMA Controller and XOR Accelerator)
4 are specified hereby. These are I2O/DMA, DMA and XOR nodes
60 iii) XOR Accelerator node
66 - interrupts : <interrupt mapping for XOR interrupt source>
/openbmc/linux/arch/arm64/crypto/
H A DKconfig165 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
182 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
214 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
245 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
/openbmc/linux/arch/parisc/math-emu/
H A Ddbl_float.h409 result = Dallp1(left) XOR Dallp1(right)
412 Dallp1(result) = left XOR Dallp1(right)
415 Dallp2(left) = Dallp2(left) XOR Dallp2(right); \
416 Dallp2(right) = Dallp2(left) XOR Dallp2(right); \
417 Dallp2(left) = Dallp2(left) XOR Dallp2(right)
546 Dextallp2(leftp2) = Dextallp2(leftp2) XOR Dextallp2(rightp2); \
547 Dextallp2(rightp2) = Dextallp2(leftp2) XOR Dextallp2(rightp2); \
548 Dextallp2(leftp2) = Dextallp2(leftp2) XOR Dextallp2(rightp2); \
549 Dextallp3(leftp3) = Dextallp3(leftp3) XOR Dextallp3(rightp3); \
550 Dextallp3(rightp3) = Dextallp3(leftp3) XOR Dextallp3(rightp3); \
[all …]
H A Dsgl_float.h236 result = Sall(left) XOR Sall(right);
239 Sall(result) = left XOR Sall(right)
328 Sextallp2(leftp2) = Sextallp2(leftp2) XOR Sextallp2(rightp2); \
329 Sextallp2(rightp2) = Sextallp2(leftp2) XOR Sextallp2(rightp2); \
330 Sextallp2(leftp2) = Sextallp2(leftp2) XOR Sextallp2(rightp2)
/openbmc/bmcweb/redfish-core/include/generated/enums/
H A Dethernet_interface.hpp43 XOR, enumerator
91 {TeamMode::XOR, "XOR"},
/openbmc/linux/arch/arm/crypto/
H A DKconfig180 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
202 - XTS (XOR Encrypt XOR with ciphertext stealing) mode (NIST SP800-38E
/openbmc/linux/scripts/atomic/kerneldoc/
H A Dxor3 * ${class}${atomicname}() - atomic bitwise XOR with ${desc_order} ordering
/openbmc/linux/drivers/crypto/caam/
H A Ddesc_constr.h429 APPEND_MATH(XOR, desc, dest, src0, src1, len)
457 APPEND_MATH_IMM_u32(XOR, desc, dest, src0, src1, data)
488 APPEND_MATH_IMM_u64(XOR, desc, dest, src0, src1, data)
/openbmc/qemu/target/rx/
H A Dinsns.decode615 # XOR #imm, rd
617 # XOR dsp[rs].ub, rd
618 # XOR rs, rd
620 # XOR dsp[rs], rd
/openbmc/linux/Documentation/staging/
H A Dcrc32.rst39 and to make the XOR cancel, it's just a copy of bit 32 of the remainder.
109 If the input is a multiple of 32 bits, you can even XOR in a 32-bit
160 final CRC is simply the XOR of the 4 table look-ups.
/openbmc/linux/arch/sparc/net/
H A Dbpf_jit_comp_32.c77 #define XOR F3(2, 0x03) macro
425 emit_alu_X(XOR); in bpf_jit_compile()
428 emit_alu_K(XOR, K); in bpf_jit_compile()
H A Dbpf_jit_comp_64.c145 #define XOR F3(2, 0x03) macro
284 emit(XOR | IMMED | RS1(reg) | S13(lbits) | RD(reg), ctx); in emit_set_const_sext()
575 emit(XOR | IMMED | RS1(dest) | S13(low_bits) | RD(dest), ctx); in emit_loadimm64()
936 emit_alu(XOR, src, dst, ctx); in build_insn()
1091 emit_alu_K(XOR, dst, imm, ctx); in build_insn()
/openbmc/linux/Documentation/networking/
H A Dbonding.rst298 switch is configured to distribute the packets in an XOR
624 XOR policy: Transmit based on the selected transmit
626 MAC address XOR'd with destination MAC address XOR
647 the default simple XOR policy via the xmit_hash_policy
907 Uses XOR of hardware MAC addresses and packet type ID
910 hash = source MAC[5] XOR destination MAC[5] XOR packet type ID
923 Uses XOR of hardware MAC addresses and IP addresses to
926 hash = source MAC[5] XOR destination MAC[5] XOR packet type ID
927 hash = hash XOR source IP XOR destination IP
928 hash = hash XOR (hash RSHIFT 16)
[all …]
/openbmc/linux/drivers/dma/
H A DKconfig446 bool "Marvell XOR engine support"
452 Enable support for the Marvell XOR engine.
455 bool "Marvell XOR engine version 2 support "
462 Enable support for the Marvell version 2 XOR engine.
464 This engine provides acceleration for copy, XOR and RAID6
/openbmc/qemu/docs/specs/
H A Dppc-spapr-hcalls.rst65 of memory (supports overlap of source and destination) and XOR which

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