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Searched refs:WSR (Results 1 – 9 of 9) sorted by relevance

/openbmc/u-boot/arch/arm/cpu/arm920t/imx/
H A Dtimer.c87 WSR = 0x00005555; in reset_cpu()
88 WSR = 0x0000AAAA; in reset_cpu()
/openbmc/linux/drivers/scsi/sym53c8xx_2/
H A Dsym_fw2.h462 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
473 SCR_REG_REG (scntl2, SCR_OR, WSR),
1464 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1466 SCR_REG_REG (scntl2, SCR_OR, WSR),
1675 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
1705 SCR_CALL ^ IFTRUE (MASK (WSR, WSR)),
H A Dsym_fw1.h478 SCR_JUMP ^ IFTRUE (MASK (WSR, WSR)),
489 SCR_REG_REG (scntl2, SCR_OR, WSR),
1591 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
1593 SCR_REG_REG (scntl2, SCR_OR, WSR),
H A Dsym_defs.h96 #define WSR 0x01 /* sta: wide scsi received [W]*/ macro
H A Dsym_hipd.c2610 (INB(np, nc_scntl2) & WSR)) {
/openbmc/u-boot/include/
H A Dsym53c8xx.h25 #define WSR 0x01 /* sta: wide scsi received [W]*/ macro
/openbmc/linux/drivers/scsi/
H A Dncr53c8xx.h617 #define WSR 0x01 /* sta: wide scsi received [W]*/ macro
H A Dncr53c8xx.c2924 SCR_JUMPR ^ IFFALSE (MASK (WSR, WSR)),
2930 SCR_REG_REG (scntl2, SCR_OR, WSR),
/openbmc/u-boot/arch/arm/include/asm/arch-imx/
H A Dimx-regs.h61 #define WSR __REG(IMX_WDT_BASE + 0x04) /* Watchdog Service Register */ macro