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Searched refs:WREG32_SOC15 (Results 1 – 25 of 97) sorted by relevance

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/openbmc/linux/drivers/gpu/drm/amd/amdgpu/
H A Dpsp_v12_0.c96 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sysdrv()
99 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sysdrv()
135 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v12_0_bootloader_load_sos()
138 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v12_0_bootloader_load_sos()
160 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v12_0_reroute_ih()
161 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih()
162 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
172 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v12_0_reroute_ih()
173 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v12_0_reroute_ih()
174 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v12_0_reroute_ih()
[all …]
H A Dnbio_v4_3.c34 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, in nbio_v4_3_remap_hdp_registers()
36 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL, in nbio_v4_3_remap_hdp_registers()
53 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, in nbio_v4_3_mc_access_enable()
57 WREG32_SOC15(NBIO, 0, regBIF_BX0_BIF_FB_EN, 0); in nbio_v4_3_mc_access_enable()
99 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_2_CTRL, doorbell_range); in nbio_v4_3_sdma_doorbell_range()
141 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_5_CTRL, doorbell_range); in nbio_v4_3_vcn_doorbell_range()
143 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_4_CTRL, doorbell_range); in nbio_v4_3_vcn_doorbell_range()
148 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_0_CTRL, 0x30000007); in nbio_v4_3_gc_doorbell_init()
149 WREG32_SOC15(NBIO, 0, regS2A_DOORBELL_ENTRY_3_CTRL, 0x3000000d); in nbio_v4_3_gc_doorbell_init()
172 WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_LOW, in nbio_v4_3_enable_doorbell_selfring_aperture()
[all …]
H A Dvcn_v1_0.c312 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode()
314 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode()
316 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v1_0_mc_resume_spg_mode()
319 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode()
321 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode()
324 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v1_0_mc_resume_spg_mode()
328 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v1_0_mc_resume_spg_mode()
331 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v1_0_mc_resume_spg_mode()
333 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v1_0_mc_resume_spg_mode()
335 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v1_0_mc_resume_spg_mode()
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H A Dgfxhub_v2_1.c143 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs()
148 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_1_init_gart_aperture_regs()
150 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_1_init_gart_aperture_regs()
159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_1_init_system_aperture_regs()
160 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs()
161 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs()
164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_1_init_system_aperture_regs()
166 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_1_init_system_aperture_regs()
171 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v2_1_init_system_aperture_regs()
[all …]
H A Dpsp_v3_1.c102 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sysdrv()
105 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sysdrv()
141 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_36, in psp_v3_1_bootloader_load_sos()
144 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_35, in psp_v3_1_bootloader_load_sos()
165 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 3); in psp_v3_1_reroute_ih()
166 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih()
167 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
177 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, 4); in psp_v3_1_reroute_ih()
178 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, tmp); in psp_v3_1_reroute_ih()
179 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, GFX_CTRL_CMD_ID_GBR_IH_SET); in psp_v3_1_reroute_ih()
[all …]
H A Dmmhub_v2_3.c139 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs()
141 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs()
144 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v2_3_init_gart_aperture_regs()
146 WREG32_SOC15(MMHUB, 0, mmMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v2_3_init_gart_aperture_regs()
156 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BASE, 0); in mmhub_v2_3_init_system_aperture_regs()
157 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_3_init_system_aperture_regs()
158 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_3_init_system_aperture_regs()
161 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_3_init_system_aperture_regs()
163 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_3_init_system_aperture_regs()
168 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v2_3_init_system_aperture_regs()
[all …]
H A Dlsdma_v6_0.c47 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_LO, lower_32_bits(src_addr)); in lsdma_v6_0_copy_mem()
48 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_SRC_ADDR_HI, upper_32_bits(src_addr)); in lsdma_v6_0_copy_mem()
50 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr)); in lsdma_v6_0_copy_mem()
51 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr)); in lsdma_v6_0_copy_mem()
53 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0); in lsdma_v6_0_copy_mem()
63 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_COMMAND, tmp); in lsdma_v6_0_copy_mem()
80 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONSTFILL_DATA, data); in lsdma_v6_0_fill_mem()
82 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_LO, lower_32_bits(dst_addr)); in lsdma_v6_0_fill_mem()
83 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_DST_ADDR_HI, upper_32_bits(dst_addr)); in lsdma_v6_0_fill_mem()
85 WREG32_SOC15(LSDMA, 0, regLSDMA_PIO_CONTROL, 0x0); in lsdma_v6_0_fill_mem()
[all …]
H A Dgfxhub_v3_0.c139 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_init_gart_aperture_regs()
141 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_init_gart_aperture_regs()
144 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_init_gart_aperture_regs()
146 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_init_gart_aperture_regs()
155 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0); in gfxhub_v3_0_init_system_aperture_regs()
156 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v3_0_init_system_aperture_regs()
157 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v3_0_init_system_aperture_regs()
161 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v3_0_init_system_aperture_regs()
163 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v3_0_init_system_aperture_regs()
169 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v3_0_init_system_aperture_regs()
[all …]
H A Dmmhub_v3_0.c156 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_init_gart_aperture_regs()
158 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_init_gart_aperture_regs()
161 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_init_gart_aperture_regs()
163 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_init_gart_aperture_regs()
181 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_init_system_aperture_regs()
182 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_init_system_aperture_regs()
183 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_init_system_aperture_regs()
186 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_init_system_aperture_regs()
188 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_init_system_aperture_regs()
194 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v3_0_init_system_aperture_regs()
[all …]
H A Dmmhub_v3_0_1.c158 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_1_init_gart_aperture_regs()
160 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_1_init_gart_aperture_regs()
163 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_1_init_gart_aperture_regs()
165 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_1_init_gart_aperture_regs()
175 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_1_init_system_aperture_regs()
176 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_1_init_system_aperture_regs()
177 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_1_init_system_aperture_regs()
185 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_1_init_system_aperture_regs()
187 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_1_init_system_aperture_regs()
193 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v3_0_1_init_system_aperture_regs()
[all …]
H A Dmmhub_v3_0_2.c149 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v3_0_2_init_gart_aperture_regs()
151 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v3_0_2_init_gart_aperture_regs()
154 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v3_0_2_init_gart_aperture_regs()
156 WREG32_SOC15(MMHUB, 0, regMMVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v3_0_2_init_gart_aperture_regs()
166 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BASE, 0); in mmhub_v3_0_2_init_system_aperture_regs()
167 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v3_0_2_init_system_aperture_regs()
168 WREG32_SOC15(MMHUB, 0, regMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v3_0_2_init_system_aperture_regs()
177 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v3_0_2_init_system_aperture_regs()
179 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v3_0_2_init_system_aperture_regs()
186 WREG32_SOC15(MMHUB, 0, regMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v3_0_2_init_system_aperture_regs()
[all …]
H A Dgfxhub_v2_0.c140 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs()
142 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs()
145 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v2_0_init_gart_aperture_regs()
147 WREG32_SOC15(GC, 0, mmGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v2_0_init_gart_aperture_regs()
157 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BASE, 0); in gfxhub_v2_0_init_system_aperture_regs()
158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_0_init_system_aperture_regs()
159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_0_init_system_aperture_regs()
162 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v2_0_init_system_aperture_regs()
164 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v2_0_init_system_aperture_regs()
169 WREG32_SOC15(GC, 0, mmGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v2_0_init_system_aperture_regs()
[all …]
H A Dgfxhub_v3_0_3.c142 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v3_0_3_init_gart_aperture_regs()
144 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v3_0_3_init_gart_aperture_regs()
147 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v3_0_3_init_gart_aperture_regs()
149 WREG32_SOC15(GC, 0, regGCVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v3_0_3_init_gart_aperture_regs()
161 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BASE, 0); in gfxhub_v3_0_3_init_system_aperture_regs()
162 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v3_0_3_init_system_aperture_regs()
163 WREG32_SOC15(GC, 0, regGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v3_0_3_init_system_aperture_regs()
166 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_LOW_ADDR, in gfxhub_v3_0_3_init_system_aperture_regs()
168 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in gfxhub_v3_0_3_init_system_aperture_regs()
174 WREG32_SOC15(GC, 0, regGCMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v3_0_3_init_system_aperture_regs()
[all …]
H A Dpsp_v11_0_8.c39 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_stop()
48 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, in psp_v11_0_8_ring_stop()
77 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v11_0_8_ring_create()
80 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v11_0_8_ring_create()
83 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_101, in psp_v11_0_8_ring_create()
104 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v11_0_8_ring_create()
107 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_70, psp_ring_reg); in psp_v11_0_8_ring_create()
110 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_71, psp_ring_reg); in psp_v11_0_8_ring_create()
114 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_64, psp_ring_reg); in psp_v11_0_8_ring_create()
163 WREG32_SOC15(MP0, 0, mmMP0_SMN_C2PMSG_102, value); in psp_v11_0_8_ring_set_wptr()
[all …]
H A Dmmhub_v1_8.c95 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
98 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
102 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
105 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
110 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
113 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
117 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
120 WREG32_SOC15(MMHUB, i, in mmhub_v1_8_init_gart_aperture_regs()
139 WREG32_SOC15(MMHUB, i, regMC_VM_AGP_BASE, 0); in mmhub_v1_8_init_system_aperture_regs()
140 WREG32_SOC15(MMHUB, i, regMC_VM_AGP_BOT, in mmhub_v1_8_init_system_aperture_regs()
[all …]
H A Dvcn_v2_0.c341 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume()
343 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume()
345 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_0_mc_resume()
348 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_0_mc_resume()
350 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume()
353 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_0_mc_resume()
357 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_0_mc_resume()
360 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_0_mc_resume()
362 WREG32_SOC15(UVD, 0, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_0_mc_resume()
364 WREG32_SOC15(UVD, 0, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v2_0_mc_resume()
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H A Dgfxhub_v1_0.c69 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
71 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
74 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
76 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
79 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
81 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
84 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in gfxhub_v1_0_init_gart_aperture_regs()
86 WREG32_SOC15(GC, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in gfxhub_v1_0_init_gart_aperture_regs()
126 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in gfxhub_v1_0_init_system_aperture_regs()
128 WREG32_SOC15(GC, 0, mmMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in gfxhub_v1_0_init_system_aperture_regs()
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H A Dmmhub_v1_0.c74 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_LO32, in mmhub_v1_0_init_gart_aperture_regs()
76 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_START_ADDR_HI32, in mmhub_v1_0_init_gart_aperture_regs()
79 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_LO32, in mmhub_v1_0_init_gart_aperture_regs()
81 WREG32_SOC15(MMHUB, 0, mmVM_CONTEXT0_PAGE_TABLE_END_ADDR_HI32, in mmhub_v1_0_init_gart_aperture_regs()
91 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BASE, 0); in mmhub_v1_0_init_system_aperture_regs()
92 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v1_0_init_system_aperture_regs()
93 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v1_0_init_system_aperture_regs()
96 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v1_0_init_system_aperture_regs()
108 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v1_0_init_system_aperture_regs()
112 WREG32_SOC15(MMHUB, 0, mmMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v1_0_init_system_aperture_regs()
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H A Dpsp_v13_0_4.c116 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, in psp_v13_0_4_bootloader_load_component()
119 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, in psp_v13_0_4_bootloader_load_component()
179 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_36, in psp_v13_0_4_bootloader_load_sos()
182 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_35, in psp_v13_0_4_bootloader_load_sos()
202 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, in psp_v13_0_4_ring_stop()
211 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_64, in psp_v13_0_4_ring_stop()
240 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_102, psp_ring_reg); in psp_v13_0_4_ring_create()
243 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_103, psp_ring_reg); in psp_v13_0_4_ring_create()
246 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_101, in psp_v13_0_4_ring_create()
267 WREG32_SOC15(MP0, 0, regMP0_SMN_C2PMSG_69, psp_ring_reg); in psp_v13_0_4_ring_create()
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H A Dnbio_v7_7.c33 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_MEM_FLUSH_CNTL, in nbio_v7_7_remap_hdp_registers()
35 WREG32_SOC15(NBIO, 0, regBIF_BX0_REMAP_HDP_REG_FLUSH_CNTL, in nbio_v7_7_remap_hdp_registers()
53 WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN, in nbio_v7_7_mc_access_enable()
57 WREG32_SOC15(NBIO, 0, regBIF_BX1_BIF_FB_EN, 0); in nbio_v7_7_mc_access_enable()
117 WREG32_SOC15(NBIO, 0, regRCC_DEV0_EPF0_0_RCC_DOORBELL_APER_EN, reg); in nbio_v7_7_enable_doorbell_aperture()
133 WREG32_SOC15(NBIO, 0, in nbio_v7_7_enable_doorbell_selfring_aperture()
136 WREG32_SOC15(NBIO, 0, in nbio_v7_7_enable_doorbell_selfring_aperture()
141 WREG32_SOC15(NBIO, 0, regBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_CNTL, in nbio_v7_7_enable_doorbell_selfring_aperture()
165 WREG32_SOC15(NBIO, 0, regGDC0_BIF_IH_DOORBELL_RANGE, in nbio_v7_7_ih_doorbell_range()
174 WREG32_SOC15(NBIO, 0, regBIF_BX1_INTERRUPT_CNTL2, in nbio_v7_7_ih_control()
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H A Dvcn_v3_0.c455 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v3_0_mc_resume()
457 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume()
459 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v3_0_mc_resume()
462 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v3_0_mc_resume()
464 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume()
467 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v3_0_mc_resume()
470 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v3_0_mc_resume()
473 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v3_0_mc_resume()
475 WREG32_SOC15(VCN, inst, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v3_0_mc_resume()
477 WREG32_SOC15(VCN, inst, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v3_0_mc_resume()
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H A Dvcn_v2_5.c425 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_5_mc_resume()
427 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume()
429 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0, 0); in vcn_v2_5_mc_resume()
432 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in vcn_v2_5_mc_resume()
434 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume()
437 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET0, in vcn_v2_5_mc_resume()
440 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_SIZE0, size); in vcn_v2_5_mc_resume()
443 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_LOW, in vcn_v2_5_mc_resume()
445 WREG32_SOC15(VCN, i, mmUVD_LMI_VCPU_CACHE1_64BIT_BAR_HIGH, in vcn_v2_5_mc_resume()
447 WREG32_SOC15(VCN, i, mmUVD_VCPU_CACHE_OFFSET1, 0); in vcn_v2_5_mc_resume()
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H A Dgfx_v11_0.c761 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_ind()
771 WREG32_SOC15(GC, 0, regSQ_IND_INDEX, in wave_read_regs()
1286 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_HI, upper_32_bits(gpu_addr)); in gfx_v11_0_rlc_backdoor_autoload_enable()
1287 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_ADDR_LO, lower_32_bits(gpu_addr)); in gfx_v11_0_rlc_backdoor_autoload_enable()
1289 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_BOOTLOADER_SIZE, rlc_g_size); in gfx_v11_0_rlc_backdoor_autoload_enable()
1555 WREG32_SOC15(GC, 0, regGRBM_GFX_INDEX, data); in gfx_v11_0_select_se_sh()
1647 WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v11_0_init_compute_vmid()
1648 WREG32_SOC15(GC, 0, regSH_MEM_BASES, sh_mem_bases); in gfx_v11_0_init_compute_vmid()
1653 WREG32_SOC15(GC, 0, regSPI_GDBG_PER_VMID_CNTL, data); in gfx_v11_0_init_compute_vmid()
1726 WREG32_SOC15(GC, 0, regSH_MEM_CONFIG, DEFAULT_SH_MEM_CONFIG); in gfx_v11_0_constants_init()
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H A Dmmhub_v2_0.c230 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_LOW_ADDR, in mmhub_v2_0_init_system_aperture_regs()
232 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_HIGH_ADDR, in mmhub_v2_0_init_system_aperture_regs()
238 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_LSB, in mmhub_v2_0_init_system_aperture_regs()
240 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_SYSTEM_APERTURE_DEFAULT_ADDR_MSB, in mmhub_v2_0_init_system_aperture_regs()
244 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_LO32, in mmhub_v2_0_init_system_aperture_regs()
246 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_DEFAULT_ADDR_HI32, in mmhub_v2_0_init_system_aperture_regs()
252 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_PROTECTION_FAULT_CNTL2, tmp); in mmhub_v2_0_init_system_aperture_regs()
271 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_MX_L1_TLB_CNTL, tmp); in mmhub_v2_0_init_tlb_regs()
296 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL, tmp); in mmhub_v2_0_init_cache_regs()
301 WREG32_SOC15(MMHUB, 0, mmMMVM_L2_CNTL2, tmp); in mmhub_v2_0_init_cache_regs()
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H A Duvd_v7_0.c140 WREG32_SOC15(UVD, ring->me, mmUVD_RBC_RB_WPTR, lower_32_bits(ring->wptr)); in uvd_v7_0_ring_set_wptr()
162 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR, in uvd_v7_0_enc_ring_set_wptr()
165 WREG32_SOC15(UVD, ring->me, mmUVD_RB_WPTR2, in uvd_v7_0_enc_ring_set_wptr()
680 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in uvd_v7_0_mc_resume()
684 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume()
688 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, 0); in uvd_v7_0_mc_resume()
691 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_LOW, in uvd_v7_0_mc_resume()
693 WREG32_SOC15(UVD, i, mmUVD_LMI_VCPU_CACHE_64BIT_BAR_HIGH, in uvd_v7_0_mc_resume()
696 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_OFFSET0, in uvd_v7_0_mc_resume()
700 WREG32_SOC15(UVD, i, mmUVD_VCPU_CACHE_SIZE0, size); in uvd_v7_0_mc_resume()
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