Searched refs:WM_SET_COUNT (Results 1 – 11 of 11) sorted by relevance
41 #define WM_SET_COUNT 4 macro81 #define WM_SET_COUNT 4 macro217 struct nv_wm_range_entry nv_entries[WM_SET_COUNT];218 struct wm_range_table_entry entries[WM_SET_COUNT];
349 for (i = 0; i < WM_SET_COUNT; i++) { in dcn316_build_watermark_ranges()546 for (i = 0; i < WM_SET_COUNT; i++) { in dcn316_clk_mgr_helper_populate_bw_params()
460 for (i = 0; i < WM_SET_COUNT; i++) { in build_watermark_ranges()677 for (i = 0; i < WM_SET_COUNT; i++) { in rn_clk_mgr_helper_populate_bw_params()
392 for (i = 0; i < WM_SET_COUNT; i++) { in vg_build_watermark_ranges()600 for (i = 0; i < WM_SET_COUNT; i++) { in vg_clk_mgr_helper_populate_bw_params()
427 for (i = 0; i < WM_SET_COUNT; i++) { in dcn31_build_watermark_ranges()618 for (i = 0; i < WM_SET_COUNT; i++) { in dcn31_clk_mgr_helper_populate_bw_params()
387 for (i = 0; i < WM_SET_COUNT; i++) { in dcn315_build_watermark_ranges()571 for (i = 0; i < WM_SET_COUNT; i++) { in dcn315_clk_mgr_helper_populate_bw_params()
442 for (i = 0; i < WM_SET_COUNT; i++) { in dcn314_build_watermark_ranges()691 for (i = 0; i < WM_SET_COUNT; i++) { in dcn314_clk_mgr_helper_populate_bw_params()
339 for (i = 0; i < WM_SET_COUNT; i++) in dcn3_notify_wm_ranges()
42 #define WM_SET_COUNT 4 macro1522 ranges.num_reader_wm_sets = WM_SET_COUNT; in dcn_bw_notify_pplib_of_wm_ranges()1523 ranges.num_writer_wm_sets = WM_SET_COUNT; in dcn_bw_notify_pplib_of_wm_ranges()
2175 for (i = 0; i < WM_SET_COUNT; i++) { in patch_bounding_box()2182 for (i = 0; i < WM_SET_COUNT; i++) { in patch_bounding_box()2193 for (i = 0; i < WM_SET_COUNT; i++) { in patch_bounding_box()
795 for (i = 0; i < WM_SET_COUNT; i++) in dcn32_notify_wm_ranges()