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Searched refs:WINDOW_BASE (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/target/xtensa/
H A Dwin_helper.c79 copy_window_from_phys(env, 0, env->sregs[WINDOW_BASE] * 4, 16); in xtensa_sync_window_from_phys()
84 copy_phys_from_window(env, env->sregs[WINDOW_BASE] * 4, 0, 16); in xtensa_sync_phys_from_window()
90 env->sregs[WINDOW_BASE] = windowbase_bound(position, env); in xtensa_rotate_window_abs()
96 xtensa_rotate_window_abs(env, env->sregs[WINDOW_BASE] + delta); in xtensa_rotate_window()
109 env->windowbase_next = env->sregs[WINDOW_BASE] + callinc; in HELPER()
115 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env); in HELPER()
117 (env->sregs[WINDOW_BASE] + 1); in HELPER()
144 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env); in HELPER()
168 windowstart_bit(env->sregs[WINDOW_BASE] - n, env))) { in HELPER()
169 uint32_t windowbase = windowbase_bound(env->sregs[WINDOW_BASE], env); in HELPER()
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H A Dcpu.h121 WINDOW_BASE = 72, enumerator
788 (env->sregs[WINDOW_BASE] + 1); in cpu_get_tb_cpu_state()
H A Dtranslate.c1273 bool cw = env->sregs[WINDOW_BASE] == i / 4; in xtensa_cpu_dump_state()
2022 tcg_gen_shl_i32(tmp, tcg_constant_i32(1), cpu_SR[WINDOW_BASE]); in translate_retw()
2057 tcg_gen_shl_i32(tmp, tcg_constant_i32(1), cpu_SR[WINDOW_BASE]); in translate_rfw()
2074 tcg_gen_addi_i32(cpu_windowbase_next, cpu_SR[WINDOW_BASE], arg[0].imm); in translate_rotw()
4456 WINDOW_BASE,
5379 WINDOW_BASE,
6108 WINDOW_BASE,
/openbmc/qemu/linux-user/xtensa/
H A Dsignal.c67 uint32_t wb = env->sregs[WINDOW_BASE]; in flush_window_regs()
105 g_assert(env->sregs[WINDOW_BASE] == wb); in flush_window_regs()
218 env->sregs[WINDOW_BASE] = 0; in setup_rt_frame()
260 env->sregs[WINDOW_BASE] = 0; in restore_sigcontext()
H A Dcpu_loop.c34 env->sregs[WINDOW_START] |= (1 << env->sregs[WINDOW_BASE]); in xtensa_rfwu()
40 env->sregs[WINDOW_START] &= ~(1 << env->sregs[WINDOW_BASE]); in xtensa_rfwo()
197 env->sregs[WINDOW_BASE]); in cpu_loop()
H A Dtarget_cpu.h13 env->sregs[WINDOW_BASE] = 0; in cpu_clone_regs_child()
/openbmc/u-boot/drivers/mmc/
H A Dmvebu_mmc.c337 mvebu_mmc_write(WINDOW_BASE(i), 0); in mvebu_window_setup()
373 mvebu_mmc_write(WINDOW_BASE(i), base); in mvebu_window_setup()
/openbmc/u-boot/include/
H A Dmvebu_mmc.h74 #define WINDOW_BASE(i) (0x10c + ((i) << 3)) macro
/openbmc/linux/drivers/dma/
H A Dmv_xor.h69 #define WINDOW_BASE(w) (0x50 + ((w) << 2)) macro
H A Dmv_xor.c539 base + WINDOW_BASE(i)); in mv_xor_add_io_win()
1170 writel(0, base + WINDOW_BASE(i)); in mv_xor_conf_mbus_windows()
1181 dram->mbus_dram_target_id, base + WINDOW_BASE(i)); in mv_xor_conf_mbus_windows()
1206 writel(0, base + WINDOW_BASE(i)); in mv_xor_conf_mbus_windows_a3700()
/openbmc/linux/drivers/net/ethernet/marvell/
H A Dmv643xx_eth.c64 #define WINDOW_BASE(w) (0x0200 + ((w) << 3)) macro
2635 writel(0, base + WINDOW_BASE(i)); in mv643xx_eth_conf_mbus_windows()
2649 dram->mbus_dram_target_id, base + WINDOW_BASE(i)); in mv643xx_eth_conf_mbus_windows()
/openbmc/linux/drivers/ata/
H A Dsata_mv.c445 #define WINDOW_BASE(i) (0x20034 + ((i) << 4)) macro
3989 writel(0, hpriv->base + WINDOW_BASE(i)); in mv_conf_mbus_windows()
3999 writel(cs->base, hpriv->base + WINDOW_BASE(i)); in mv_conf_mbus_windows()
/openbmc/qemu/linux-user/
H A Delfload.c1991 (*regs)[TARGET_REG_WINDOWBASE] = tswapreg(env->sregs[WINDOW_BASE]); in elf_core_copy_regs()