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Searched refs:WAKE (Results 1 – 25 of 30) sorted by relevance

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/openbmc/linux/arch/powerpc/include/asm/
H A Ddbdma.h36 #define WAKE 0x1000 macro
103 out_le32(&((regs)->control), (ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)<<16);\
/openbmc/linux/drivers/net/ethernet/apple/
H A Dmace.c307 out_le32(&dma->control, (WAKE|FLUSH|PAUSE|RUN) << 16); in dbdma_reset()
477 out_le32(&rd->control, (RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_open()
487 out_le32(&td->control, (RUN|PAUSE|FLUSH|WAKE) << 16); in mace_open()
515 rd->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
516 td->control = cpu_to_le32((RUN|PAUSE|FLUSH|WAKE) << 16); /* clear run bit */ in mace_close()
576 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE)); in mace_xmit_start()
801 out_le32(&td->control, ((RUN|WAKE) << 16) + (RUN|WAKE)); in mace_interrupt()
983 out_le32(&rd->control, ((RUN|WAKE) << 16) | (RUN|WAKE)); in mace_rxdma_intr()
H A Dbmac.c181 DBDMA_SET(RUN|WAKE) | DBDMA_CLEAR(PAUSE|DEAD)); in dbdma_continue()
189 DBDMA_CLEAR(ACTIVE|DEAD|WAKE|FLUSH|PAUSE|RUN)); in dbdma_reset()
482 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
483 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_suspend()
1406 rd->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1407 td->control = cpu_to_le32(DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE)); /* clear run bit */ in bmac_close()
1496 out_le32(&td->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
1502 out_le32(&rd->control, DBDMA_CLEAR(RUN|PAUSE|FLUSH|WAKE|ACTIVE|DEAD)); in bmac_tx_timeout()
1505 out_le32(&rd->control, DBDMA_SET(RUN|WAKE)); in bmac_tx_timeout()
/openbmc/qemu/hw/misc/macio/
H A Dmac_dbdma.c460 ch->regs[DBDMA_STATUS] &= ~WAKE; in channel_run()
629 if ((mask & WAKE) && (value & WAKE) && (status & RUN)) { in dbdma_control_write()
630 status |= WAKE; in dbdma_control_write()
676 } else if ((mask & WAKE) && (value & WAKE)) { in dbdma_control_write()
/openbmc/linux/arch/arm/boot/dts/allwinner/
H A Dsun8i-h2-plus-bananapi-m2-zero.dts243 "BT-UART-RTS", "BT-UART-CTS", "WL-WAKE-AP", "BT-WAKE-AP",
244 "BT-RST-N", "AP-WAKE-BT", "", "",
H A Dsun6i-a31s-sinovoip-bpi-m2.dts326 "WL-WAKE-HOST", "BT-WAKE_HOST", "BT-ENABLE",
/openbmc/linux/sound/ppc/
H A Dpmac.c155 out_le32(&rec->dma->control, (RUN|WAKE|FLUSH|PAUSE) << 16); in snd_pmac_dma_stop()
263 snd_pmac_dma_run(rec, RUN|WAKE); in snd_pmac_pcm_trigger()
392 out_le32(&rec->dma->control, (RUN|PAUSE|FLUSH|WAKE) << 16); in snd_pmac_pcm_dead_xfer()
425 out_le32(&rec->dma->control, ((RUN|WAKE) << 16) + (RUN|WAKE)); in snd_pmac_pcm_dead_xfer()
710 out_le32(&chip->playback.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); in snd_pmac_dbdma_reset()
712 out_le32(&chip->capture.dma->control, (RUN|PAUSE|FLUSH|WAKE|DEAD) << 16); in snd_pmac_dbdma_reset()
/openbmc/linux/arch/arm64/boot/dts/rockchip/
H A Dpx30-ringneck-haikou.dts41 label = "WAKE#";
177 /* WAKE# */
/openbmc/u-boot/arch/arm/dts/
H A Dmeson-gxl-s905x-khadas-vim.dts161 "WIFI Power Enable", "WIFI WAKE HOST",
167 "Bluetooth WAKE HOST",
H A Dmeson-gxbb-nanopi-k2.dts241 "WIFI Power Enable", "WIFI WAKE HOST",
247 "Bluetooth WAKE HOST", "",
H A Dsun50i-a64-amarula-relic.dts56 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
/openbmc/linux/arch/arm64/boot/dts/amlogic/
H A Dmeson-gxl-s905x-khadas-vim.dts195 "WIFI Power Enable", "WIFI WAKE HOST",
201 "Bluetooth WAKE HOST",
H A Dmeson-gxbb-nanopi-k2.dts282 "WIFI Power Enable", "WIFI WAKE HOST",
288 "Bluetooth WAKE HOST", "",
/openbmc/qemu/include/hw/ppc/
H A Dmac_dbdma.h83 #define WAKE 0x1000 macro
/openbmc/linux/tools/perf/trace/beauty/
H A Dfutex_op.c39 P_FUTEX_OP(WAKE); arg->mask |= SCF_VAL3|SCF_UADDR2|SCF_TIMEOUT; break; in syscall_arg__scnprintf_futex_op()
/openbmc/linux/Documentation/devicetree/bindings/rtc/
H A Drtc-omap.txt7 This RTC IP has special WAKE-EN Register to enable
/openbmc/linux/Documentation/driver-api/
H A Dhsi.rst16 signals and an additional READY signal for flow control. An additional WAKE
/openbmc/linux/drivers/scsi/
H A Dmac53c94.c112 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in DEF_SCSI_QCMD()
137 writel((RUN|PAUSE|FLUSH|WAKE) << 16, &dma->control); in mac53c94_init()
/openbmc/linux/drivers/pinctrl/nomadik/
H A Dpinctrl-nomadik.c626 WAKE, enumerator
680 __nmk_gpio_irq_modify(nmk_chip, offset, WAKE, on); in __nmk_gpio_set_wake()
765 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, false); in nmk_gpio_irq_set_type()
779 __nmk_gpio_irq_modify(nmk_chip, d->hwirq, WAKE, true); in nmk_gpio_irq_set_type()
/openbmc/linux/arch/arm64/boot/dts/allwinner/
H A Dsun50i-a64-amarula-relic.dts150 interrupts = <0 3 IRQ_TYPE_LEVEL_LOW>; /* WL-WAKE-AP: PL3 */
/openbmc/linux/drivers/ata/
H A Dpata_macio.c588 writel((RUN|PAUSE|FLUSH|WAKE|DEAD) << 16, &dma_regs->control); in pata_macio_freeze()
649 writel (((RUN|WAKE|DEAD) << 16), &dma_regs->control); in pata_macio_bmdma_stop()
/openbmc/linux/Documentation/networking/
H A Dcan_ucan_protocol.rst154 UCAN_SLEEP/WAKE
/openbmc/linux/arch/arm/boot/dts/nxp/imx/
H A Dimx6qdl-mba6.dtsi495 MX6QDL_PAD_SD4_DAT3__GPIO2_IO11 0x001b0f0 /* #PCIE.WAKE */
/openbmc/qemu/hw/char/
H A Dstm32l4x5_usart.c45 FIELD(CR1, WAKE, 11, 1) /* Receiver wakeup method */
/openbmc/linux/arch/arm/boot/dts/nxp/mxs/
H A Dimx28-tx28.dts482 MX28_PAD_ENET0_RXD2__GPIO_4_9 /* WAKE */

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