Searched refs:VSLLWIL (Results 1 – 1 of 1) sorted by relevance
/openbmc/qemu/target/loongarch/tcg/ |
H A D | vec_helper.c | 928 #define VSLLWIL(NAME, BIT, E1, E2) \ macro 972 VSLLWIL(vsllwil_h_b, 16, H, B) 973 VSLLWIL(vsllwil_w_h, 32, W, H) 974 VSLLWIL(vsllwil_d_w, 64, D, W) 975 VSLLWIL(vsllwil_hu_bu, 16, UH, UB) 976 VSLLWIL(vsllwil_wu_hu, 32, UW, UH) 977 VSLLWIL(vsllwil_du_wu, 64, UD, UW)
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