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Searched refs:UTCR3_TXE (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/arch/arm/mach-sa1100/include/mach/
H A Duncompress.h29 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
31 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
33 if (UART(UTCR3) & UTCR3_TXE) break; in putc()
H A DSA-1100.h359 #define UTCR3_TXE 0x00000002 /* Transmit Enable */ macro
368 (UTCR3_RXE + UTCR3_TXE)
/openbmc/linux/arch/arm/include/debug/
H A Dsa1100.S13 #define UTCR3_TXE 0x00000002 /* Transmit Enable */ macro
30 tst \rv, #UTCR3_TXE
35 tsteq \rv, #UTCR3_TXE
40 tsteq \rv, #UTCR3_TXE
/openbmc/linux/drivers/tty/serial/
H A Dsa1100.c352 UART_PUT_UTCR3(sport, UTCR3_RXE | UTCR3_TXE | UTCR3_RIE); in sa1100_startup()
697 UTCR3_TXE); in sa1100_console_write()
721 utcr3 = UART_GET_UTCR3(sport) & (UTCR3_RXE | UTCR3_TXE); in sa1100_console_get_options()
722 if (utcr3 == (UTCR3_RXE | UTCR3_TXE)) { in sa1100_console_get_options()
/openbmc/qemu/hw/arm/
H A Dstrongarm.c899 #define UTCR3_TXE (1 << 1) /* Tx enable */ macro
983 if ((s->utcr3 & UTCR3_TXE) && in strongarm_uart_update_int_status()
1212 if ((s->utcr3 & UTCR3_TXE) == 0) { in strongarm_uart_write()
1220 if ((s->utcr3 & UTCR3_TXE) && s->tx_len != 8) { in strongarm_uart_write()
1283 s->utcr3 = UTCR3_TXE | UTCR3_RXE; in strongarm_uart_reset()
/openbmc/linux/drivers/mfd/
H A Dipaq-micro.c321 writel(UTCR3_TXE | UTCR3_RXE | UTCR3_RIE, micro->base + UTCR3); in micro_reset_comm()
/openbmc/u-boot/include/
H A DSA-1100.h573 #define UTCR3_TXE 0x00000002 /* Transmit Enable */ macro
582 (UTCR3_RXE + UTCR3_TXE)