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Searched refs:UNIPHIER_SSCC (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-uniphier/arm32/
H A Dcache-uniphier.c17 #define UNIPHIER_SSCC 0x500c0000 /* Control Register */ macro
196 void __iomem *base = (void __iomem *)UNIPHIER_SSCC + 0xc00; in uniphier_cache_set_active_ways()
201 base = (void __iomem *)UNIPHIER_SSCC + 0x840; in uniphier_cache_set_active_ways()
204 base = (void __iomem *)UNIPHIER_SSCC + 0xc00; in uniphier_cache_set_active_ways()
215 tmp = readl(UNIPHIER_SSCC); in uniphier_cache_endisable()
220 writel(tmp, UNIPHIER_SSCC); in uniphier_cache_endisable()
/openbmc/linux/arch/arm/mm/
H A Dcache-uniphier.c19 #define UNIPHIER_SSCC 0x0 /* Control Register */ macro
226 writel_relaxed(val, data->ctrl_base + UNIPHIER_SSCC); in __uniphier_cache_enable()