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Searched refs:TTBR1_EL1 (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dsysreg-sr.h45 ctxt_sys_reg(ctxt, TTBR1_EL1) = read_sysreg_el1(SYS_TTBR1); in __sysreg_save_el1_state()
122 write_sysreg_el1(ctxt_sys_reg(ctxt, TTBR1_EL1), SYS_TTBR1); in __sysreg_restore_el1_state()
/openbmc/linux/arch/arm64/include/asm/
H A Dkvm_host.h299 TTBR1_EL1, /* Translation Table Base Register 1 */ enumerator
824 case TTBR1_EL1: *val = read_sysreg_s(SYS_TTBR1_EL12); break; in __vcpu_read_sys_reg_from_cpu()
868 case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
/openbmc/qemu/target/arm/
H A Dcpregs.h385 FIELD(HFGRTR_EL2, TTBR1_EL1, 37, 1)
432 FIELD(HFGWTR_EL2, TTBR1_EL1, 37, 1)
725 DO_BIT(HFGRTR, TTBR1_EL1),
/openbmc/linux/Documentation/admin-guide/kdump/
H A Dvmcoreinfo.rst483 Indicates the size offset of the memory region addressed by TTBR1_EL1.
486 TTBR1_EL1 is the table base address register specified by ARMv8-A
/openbmc/linux/arch/arm64/kvm/
H A Dsys_regs.c2127 { SYS_DESC(SYS_TTBR1_EL1), access_vm_reg, reset_unknown, TTBR1_EL1 },
2656 { Op1( 0), CRn( 2), CRm( 0), Op2( 1), access_vm_reg, NULL, TTBR1_EL1 },
2801 { Op1( 1), CRn( 0), CRm( 2), Op2( 0), access_vm_reg, NULL, TTBR1_EL1 },
H A Demulate-nested.c1001 SR_FGT(SYS_TTBR1_EL1, HFGxTR, TTBR1_EL1, 1),
/openbmc/linux/arch/arm64/tools/
H A Dsysreg2050 Field 37 TTBR1_EL1
2422 Sysreg TTBR1_EL1 3 0 2 0 1
/openbmc/linux/arch/arm64/
H A DKconfig1200 case-3 TTBR1_EL1 with TCR_EL1.NFD1 == 1.
1224 in TTBR1_EL1, this situation only occurs in the entry trampoline and