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Searched refs:TPS65911_VDDCTRL_SR_REG (Results 1 – 1 of 1) sorted by relevance

/openbmc/u-boot/arch/arm/mach-tegra/tegra30/
H A Dcpu.c43 #define TPS65911_VDDCTRL_SR_REG 0x27 macro
45 #define TPS65911_VDDCTRL_SR_DATA (0x0100 | TPS65911_VDDCTRL_SR_REG)