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Searched refs:TM_QW3_NSR_HE_PHYS (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h129 #define TM_QW3_NSR_HE_PHYS 2 macro
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h155 #define TM_QW3_NSR_HE_PHYS 2 macro
/openbmc/linux/arch/powerpc/sysdev/xive/
H A Dnative.c361 case TM_QW3_NSR_HE_PHYS: /* Physical thread interrupt */ in xive_native_update_pending()
/openbmc/qemu/hw/intc/
H A Dxive.c120 regs[TM_NSR] |= (TM_QW3_NSR_HE_PHYS << 6); in xive_tctx_notify()