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Searched refs:TM_QW3_NSR_HE (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/arch/powerpc/include/asm/
H A Dxive-regs.h126 #define TM_QW3_NSR_HE PPC_BITMASK8(0,1) macro
/openbmc/qemu/include/hw/ppc/
H A Dxive_regs.h152 #define TM_QW3_NSR_HE PPC_BITMASK8(0, 1) macro
/openbmc/qemu/hw/intc/
H A Dxive.c46 return TM_QW3_NSR_HE; in exception_mask()