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Searched refs:TMU_BASE (Results 1 – 23 of 23) sorted by relevance

/openbmc/u-boot/arch/sh/lib/
H A Dtime.c32 writew(readw(TMU_BASE + TCR0) & ~TCR_TPSC, TMU_BASE + TCR0); in timer_init()
33 writeb(readb(TMU_BASE + TSTR) & ~TSTR_STR0, TMU_BASE + TSTR); in timer_init()
34 writeb(readb(TMU_BASE + TSTR) | TSTR_STR0, TMU_BASE + TSTR); in timer_init()
/openbmc/u-boot/board/renesas/rcar-common/
H A Dcommon.c53 mstp_clrbits_le32(TMU_BASE + TSTR0, TMU_BASE + TSTR0, TSTR0_STR0); in arch_preboot_os()
/openbmc/u-boot/arch/sh/include/asm/
H A Dconfig.h14 #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0x8) /* TCNT0 */
H A Dcpu_sh7763.h32 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7706.h44 #define TMU_BASE 0xFFFFFE90 macro
H A Dcpu_sh7710.h54 #define TMU_BASE 0xA412FE90 macro
H A Dcpu_sh7734.h25 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7750.h132 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7785.h34 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7723.h84 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7724.h105 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7757.h39 #define TMU_BASE 0xFE430000 macro
H A Dcpu_sh7752.h36 #define TMU_BASE 0xFE430000 macro
H A Dcpu_sh7753.h36 #define TMU_BASE 0xFE430000 macro
H A Dcpu_sh7720.h93 #define TMU_BASE 0xA412FE90 macro
H A Dcpu_sh7780.h260 #define TMU_BASE 0xFFD80000 macro
H A Dcpu_sh7722.h215 #define TMU_BASE 0xFFD80000 macro
/openbmc/u-boot/include/configs/
H A Drcar-gen2-common.h63 #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
H A Darmadillo-800eva.h22 #define CONFIG_SYS_TIMER_COUNTER (TMU_BASE + 0xc) /* TCNT0 */
/openbmc/u-boot/arch/arm/mach-rmobile/include/mach/
H A Drcar-gen3-base.h17 #define TMU_BASE 0xE61E0000 macro
H A Dr8a7740.h31 #define TMU_BASE 0xFFF80000 macro
H A Drcar-base.h19 #define TMU_BASE 0xE61E0000 macro
/openbmc/u-boot/drivers/clk/renesas/
H A Drenesas-cpg-mssr.c161 clrbits_le32(TMU_BASE + TSTR0, TSTR0_STR0); in renesas_clk_remove()