Searched refs:TLB_SIZE (Results 1 – 4 of 4) sorted by relevance
| /openbmc/qemu/target/openrisc/ |
| H A D | sys_helper.c | 100 case TO_SPR(1, 512) ... TO_SPR(1, 512 + TLB_SIZE - 1): /* DTLBW0MR 0-127 */ in HELPER()
111 case TO_SPR(1, 640) ... TO_SPR(1, 640 + TLB_SIZE - 1): /* DTLBW0TR 0-127 */ in HELPER()
123 case TO_SPR(2, 512) ... TO_SPR(2, 512 + TLB_SIZE - 1): /* ITLBW0MR 0-127 */ in HELPER()
134 case TO_SPR(2, 640) ... TO_SPR(2, 640 + TLB_SIZE - 1): /* ITLBW0TR 0-127 */ in HELPER()
298 case TO_SPR(1, 512) ... TO_SPR(1, 512 + TLB_SIZE - 1): /* DTLBW0MR 0-127 */ in HELPER()
302 case TO_SPR(1, 640) ... TO_SPR(1, 640 + TLB_SIZE - 1): /* DTLBW0TR 0-127 */ in HELPER()
314 case TO_SPR(2, 512) ... TO_SPR(2, 512 + TLB_SIZE - 1): /* ITLBW0MR 0-127 */ in HELPER()
318 case TO_SPR(2, 640) ... TO_SPR(2, 640 + TLB_SIZE - 1): /* ITLBW0TR 0-127 */ in HELPER()
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| H A D | cpu.h | 199 TLB_SIZE = 128, enumerator
200 TLB_MASK = TLB_SIZE - 1,
221 OpenRISCTLBEntry itlb[TLB_SIZE];
222 OpenRISCTLBEntry dtlb[TLB_SIZE];
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| H A D | cpu.c | 200 | (DMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in or1200_initfn()
202 | (IMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in or1200_initfn()
219 | (DMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in openrisc_any_initfn()
221 | (IMMUCFGR_NTS & (ctz32(TLB_SIZE) << 2)); in openrisc_any_initfn()
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| H A D | machine.c | 40 VMSTATE_STRUCT_ARRAY(itlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
42 VMSTATE_STRUCT_ARRAY(dtlb, CPUOpenRISCTLBContext, TLB_SIZE, 0,
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