Searched refs:TISR (Results 1 – 1 of 1) sorted by relevance
| /openbmc/qemu/tests/qtest/ |
| H A D | npcm7xx_timer-test.c | 33 #define TISR 0x18 macro
185 writel(timer_block[i].base_addr + TISR, -1); in tim_reset()
199 g_assert_cmphex(tim_read(td, TISR), ==, 0); in test_reset()
215 g_assert_cmphex(tim_read(td, TISR), ==, 0); in test_reset_overrides_enable()
232 g_assert_cmphex(tim_read(td, TISR), ==, tim_timer_bit(td)); in test_oneshot_enable_then_disable()
254 g_assert_cmphex(tim_read(td, TISR), ==, 0); in test_oneshot_ps5()
260 g_assert_cmphex(tim_read(td, TISR), ==, tim_timer_bit(td)); in test_oneshot_ps5()
264 tim_write(td, TISR, tim_timer_bit(td)); in test_oneshot_ps5()
265 g_assert_cmphex(tim_read(td, TISR), ==, 0); in test_oneshot_ps5()
270 g_assert_cmphex(tim_read(td, TISR), ==, 0); in test_oneshot_ps5()
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