Searched refs:THM_CLK_CNTL__TMON_CLK_SEL__SHIFT (Results 1 – 12 of 12) sorted by relevance
| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | fiji_baco.c | 99 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, …
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| H A D | polaris_baco.c | 94 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, …
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| H A D | ci_baco.c | 116 …WRITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, …
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| H A D | tonga_baco.c | 108 …RITE, mmGCK_SMC_IND_DATA, THM_CLK_CNTL__TMON_CLK_SEL_MASK, THM_CLK_CNTL__TMON_CLK_SEL__SHIFT, 0, …
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | cik.c | 1810 (1 << THM_CLK_CNTL__TMON_CLK_SEL__SHIFT); in cik_program_aspm()
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| H A D | vi.c | 1191 (1 << THM_CLK_CNTL__TMON_CLK_SEL__SHIFT); in vi_program_aspm()
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| /openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/smu/ |
| H A D | smu_7_0_0_sh_mask.h | 266 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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| H A D | smu_7_1_1_sh_mask.h | 264 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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| H A D | smu_7_0_1_sh_mask.h | 264 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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| H A D | smu_7_1_0_sh_mask.h | 262 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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| H A D | smu_7_1_3_sh_mask.h | 292 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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| H A D | smu_7_1_2_sh_mask.h | 264 #define THM_CLK_CNTL__TMON_CLK_SEL__SHIFT 0x8 macro
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