Searched refs:TCG_VEC_TMP0 (Results 1 – 4 of 4) sorted by relevance
/openbmc/qemu/tcg/loongarch64/ |
H A D | tcg-target.h | 87 TCG_VEC_TMP0 = TCG_REG_V23, enumerator
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H A D | tcg-target.c.inc | 1183 tcg_out_opc_vldx(s, TCG_VEC_TMP0, h.base, h.index); 1184 tcg_out_opc_vpickve2gr_d(s, data_lo, TCG_VEC_TMP0, 0); 1185 tcg_out_opc_vpickve2gr_d(s, data_hi, TCG_VEC_TMP0, 1); 1187 tcg_out_opc_vinsgr2vr_d(s, TCG_VEC_TMP0, data_lo, 0); 1188 tcg_out_opc_vinsgr2vr_d(s, TCG_VEC_TMP0, data_hi, 1); 1189 tcg_out_opc_vstx(s, TCG_VEC_TMP0, h.base, h.index); 2024 tcg_out_dupi_vec(s, type, vece, TCG_VEC_TMP0, a2); 2025 a2 = TCG_VEC_TMP0; 2086 TCG_VEC_TMP0, a2)); 2087 a2 = TCG_VEC_TMP0; [all …]
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/openbmc/qemu/tcg/s390x/ |
H A D | tcg-target.c.inc | 50 #define TCG_VEC_TMP0 TCG_REG_V31 2922 bool inv = tcg_out_cmp_vec_noinv(s, vece, TCG_VEC_TMP0, c1, c2, cond); 2926 tcg_out_insn(s, VRRe, VSEL, a0, v4, v3, TCG_VEC_TMP0); 2928 tcg_out_insn(s, VRRe, VSEL, a0, v3, v4, TCG_VEC_TMP0); 2932 tcg_out_insn(s, VRRc, VOC, a0, v4, TCG_VEC_TMP0, 0); 2934 tcg_out_insn(s, VRRc, VO, a0, v4, TCG_VEC_TMP0, 0); 2938 tcg_out_insn(s, VRRc, VN, a0, v4, TCG_VEC_TMP0, 0); 2940 tcg_out_insn(s, VRRc, VNC, a0, v4, TCG_VEC_TMP0, 0); 3546 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
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/openbmc/qemu/tcg/aarch64/ |
H A D | tcg-target.c.inc | 78 #define TCG_VEC_TMP0 TCG_REG_V31 2791 tcg_out_dupi_vec(s, type, MO_8, TCG_VEC_TMP0, 0); 2792 a2 = TCG_VEC_TMP0; 3189 tcg_regset_set_reg(s->reserved_regs, TCG_VEC_TMP0);
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