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Searched refs:TCG_TARGET_INSN_UNIT_SIZE (Results 1 – 12 of 12) sorted by relevance

/openbmc/qemu/include/tcg/
H A Dtcg.h183 #ifndef TCG_TARGET_INSN_UNIT_SIZE
185 #elif TCG_TARGET_INSN_UNIT_SIZE == 1
187 #elif TCG_TARGET_INSN_UNIT_SIZE == 2
189 #elif TCG_TARGET_INSN_UNIT_SIZE == 4
191 #elif TCG_TARGET_INSN_UNIT_SIZE == 8
/openbmc/qemu/tcg/tci/
H A Dtcg-target.h44 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/arm/
H A Dtcg-target.h33 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h28 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h30 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h34 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h18 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h33 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h28 #define TCG_TARGET_INSN_UNIT_SIZE 2 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h30 #define TCG_TARGET_INSN_UNIT_SIZE 4 macro
/openbmc/qemu/tcg/i386/
H A Dtcg-target.h30 #define TCG_TARGET_INSN_UNIT_SIZE 1 macro
/openbmc/qemu/tcg/
H A Dtcg.c255 #if TCG_TARGET_INSN_UNIT_SIZE == 1
268 #if TCG_TARGET_INSN_UNIT_SIZE <= 2
271 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { in tcg_out16()
276 s->code_ptr = p + (2 / TCG_TARGET_INSN_UNIT_SIZE); in tcg_out16()
283 if (TCG_TARGET_INSN_UNIT_SIZE == 2) { in tcg_patch16()
291 #if TCG_TARGET_INSN_UNIT_SIZE <= 4
294 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { in tcg_out32()
299 s->code_ptr = p + (4 / TCG_TARGET_INSN_UNIT_SIZE); in tcg_out32()
306 if (TCG_TARGET_INSN_UNIT_SIZE == 4) { in tcg_patch32()
314 #if TCG_TARGET_INSN_UNIT_SIZE <= 8
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