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Searched refs:TCG_TARGET_HAS_qemu_st8_i32 (Results 1 – 13 of 13) sorted by relevance

/openbmc/qemu/tcg/i386/
H A Dtcg-target.h193 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
195 #define TCG_TARGET_HAS_qemu_st8_i32 1 macro
/openbmc/qemu/tcg/tci/
H A Dtcg-target.h75 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/arm/
H A Dtcg-target.h124 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/sparc64/
H A Dtcg-target.h114 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/mips/
H A Dtcg-target.h168 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h132 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.h99 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/ppc/
H A Dtcg-target.h103 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/s390x/
H A Dtcg-target.h105 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.h104 #define TCG_TARGET_HAS_qemu_st8_i32 0 macro
/openbmc/qemu/include/tcg/
H A Dtcg-opc.h225 IMPL(TCG_TARGET_HAS_qemu_st8_i32))
228 IMPL(TCG_TARGET_HAS_qemu_st8_i32))
/openbmc/qemu/tcg/
H A Dtcg-op-ldst.c309 if (TCG_TARGET_HAS_qemu_st8_i32 && (memop & MO_SIZE) == MO_8) { in tcg_gen_qemu_st_i32_int()
H A Dtcg.c1963 return TCG_TARGET_HAS_qemu_st8_i32; in tcg_op_supported()