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Searched refs:TCG_REG_TMP1 (Results 1 – 6 of 6) sorted by relevance

/openbmc/qemu/tcg/ppc/
H A Dtcg-target.c.inc76 # define TCG_REG_TMP1 TCG_REG_R2
78 # define TCG_REG_TMP1 TCG_REG_R12
1322 tcg_out_addpcis(s, TCG_REG_TMP1, 0);
1332 load_insn |= VRT(ret) | RB(TCG_REG_TMP1);
1339 load_insn = LVX | VRT(ret) | RB(TCG_REG_TMP1);
1349 tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, 0, 0));
1352 tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, 0));
1354 tcg_out32(s, ADDIS | TAI(TCG_REG_TMP1, 0, 0));
1355 tcg_out32(s, ADDI | TAI(TCG_REG_TMP1, TCG_REG_TMP1, 0));
1516 TCGReg rs = TCG_REG_TMP1;
[all …]
/openbmc/qemu/tcg/riscv/
H A Dtcg-target.c.inc1098 TCGReg th = TCG_REG_TMP1;
1385 tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_TMP1, val2);
1386 val2 = TCG_REG_TMP1;
1394 tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_TMP1, val1);
1395 val1 = TCG_REG_TMP1;
1403 tcg_out_movi(s, TCG_TYPE_REG, TCG_REG_TMP1, val1 - val2);
1405 tcg_out_opc_imm(s, OPC_ADDI, TCG_REG_TMP1, val1, -val2);
1407 tcg_out_opc_reg(s, OPC_CZERO_EQZ, ret, TCG_REG_TMP1, test_ne);
1413 tcg_out_opc_imm(s, OPC_ADDI, TCG_REG_TMP1, val2, -val1);
1414 tcg_out_opc_reg(s, OPC_CZERO_NEZ, ret, TCG_REG_TMP1, test_ne);
[all …]
H A Dtcg-target.h58 TCG_REG_TMP1 = TCG_REG_T5, enumerator
/openbmc/qemu/tcg/loongarch64/
H A Dtcg-target.h85 TCG_REG_TMP1 = TCG_REG_T7, enumerator
H A Dtcg-target.c.inc704 tcg_out_opc_maskeqz(s, TCG_REG_TMP1, v1, t); /* t ? v1 : 0 */
705 tcg_out_opc_or(s, ret, TCG_REG_TMP1, TCG_REG_TMP2);
1008 tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_AREG0, table_ofs);
1013 tcg_out_opc_add_d(s, TCG_REG_TMP2, TCG_REG_TMP2, TCG_REG_TMP1);
1032 tcg_out_addi(s, addr_type, TCG_REG_TMP1, addr_reg, s_mask - a_mask);
1034 tcg_out_mov(s, addr_type, TCG_REG_TMP1, addr_reg);
1036 tcg_out_opc_bstrins_d(s, TCG_REG_TMP1, TCG_REG_ZERO,
1041 tcg_out_opc_bne(s, TCG_REG_TMP0, TCG_REG_TMP1, 0);
1058 tcg_out_opc_bstrpick_d(s, TCG_REG_TMP1, addr_reg, 0, a_bits - 1);
1061 tcg_out_opc_bne(s, TCG_REG_TMP1, TCG_REG_ZERO, 0);
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/openbmc/qemu/tcg/aarch64/
H A Dtcg-target.c.inc76 #define TCG_REG_TMP1 TCG_REG_X17
1775 tcg_out_insn(s, 3314, LDP, TCG_REG_TMP0, TCG_REG_TMP1, TCG_AREG0,
1784 tcg_out_insn(s, 3502, ADD, 1, TCG_REG_TMP1, TCG_REG_TMP1, TCG_REG_TMP0);
1788 tcg_out_ld(s, addr_type, TCG_REG_TMP0, TCG_REG_TMP1,
1791 tcg_out_ld(s, TCG_TYPE_PTR, TCG_REG_TMP1, TCG_REG_TMP1,
1820 h->base = TCG_REG_TMP1;
2006 tcg_debug_assert(base != TCG_REG_TMP0 && base != TCG_REG_TMP1);
2008 lh = TCG_REG_TMP1;
3187 tcg_regset_set_reg(s->reserved_regs, TCG_REG_TMP1);