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Searched refs:SWRST_CONTROL_1__RESETCPM_RCEN_MASK (Results 1 – 7 of 7) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/bif/
H A Dbif_5_0_sh_mask.h3491 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK 0x8000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_4_sh_mask.h44325 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro
H A Dnbio_4_3_0_sh_mask.h33686 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro
H A Dnbio_7_0_sh_mask.h75051 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro
H A Dnbio_2_3_sh_mask.h55842 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro
H A Dnbio_6_1_sh_mask.h39616 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro
H A Dnbio_7_2_0_sh_mask.h101318 #define SWRST_CONTROL_1__RESETCPM_RCEN_MASK … macro