/openbmc/openbmc/meta-openembedded/meta-oe/recipes-benchmark/cpuburn/cpuburn-arm/ |
H A D | 0001-cpuburn-a8.S-Remove-.func-.endfunc.patch | 42 #define STEP 16 49 subs lr, lr, #(STEP * 4) 59 #define STEP 64 66 subsne lr, lr, #(STEP * 4)
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/openbmc/phosphor-mboxd/test/ |
H A D | mbox.c | 24 #define STEP 16 macro 31 for (i = 0; i < len; i += STEP) { in dump_buf() 37 max = delta > STEP ? STEP : delta; in dump_buf()
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/openbmc/hiomapd/test/ |
H A D | mbox.c | 26 #define STEP 16 macro 33 for (i = 0; i < len; i += STEP) { in dump_buf() 39 max = delta > STEP ? STEP : delta; in dump_buf()
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/openbmc/linux/Documentation/PCI/ |
H A D | pci-error-recovery.rst | 119 STEP 0: Error Event 126 STEP 1: Notification 161 proceeds to STEP 2 (MMIO Enable). 164 then recovery proceeds to STEP 4 (Slot Reset). 167 is STEP 6 (Permanent Failure). 188 STEP 2: MMIO Enabled 202 instead will have gone directly to STEP 3 (Link Reset) or STEP 4 (Slot Reset) 237 proceeds to either STEP3 (Link Reset) or to STEP 5 (Resume Operations). 240 proceeds to STEP 4 (Slot Reset) 242 STEP 3: Link Reset [all …]
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/openbmc/linux/drivers/cpufreq/ |
H A D | imx6q-cpufreq.c | 29 STEP, enumerator 135 clk_set_parent(clks[STEP].clk, clks[SECONDARY_SEL].clk); in imx6q_set_target() 136 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target() 142 clk_set_parent(clks[STEP].clk, clks[PLL2_PFD2_396M].clk); in imx6q_set_target() 143 clk_set_parent(clks[PLL1_SW].clk, clks[STEP].clk); in imx6q_set_target()
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/openbmc/linux/arch/powerpc/crypto/ |
H A D | sha1-powerpc-asm.S | 114 STEP##fn##_UPDATE(t); \ 115 STEP##fn##_UPDATE((t)+1); \ 116 STEP##fn##_UPDATE((t)+2); \ 117 STEP##fn##_UPDATE((t)+3)
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/openbmc/linux/include/linux/ceph/ |
H A D | messenger.h | 136 #define __ceph_bio_iter_advance_step(it, n, STEP) do { \ argument 142 (void)(STEP); \ 180 #define __ceph_bvec_iter_advance_step(it, n, STEP) do { \ argument 182 (void)(STEP); \
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/openbmc/linux/lib/ |
H A D | iov_iter.c | 18 #define iterate_buf(i, n, base, len, off, __p, STEP) { \ argument 22 len -= (STEP); \ 28 #define iterate_iovec(i, n, base, len, off, __p, STEP) { \ argument 35 len -= (STEP); \ 49 #define iterate_bvec(i, n, base, len, off, p, STEP) { \ argument 60 left = (STEP); \ 77 #define iterate_xarray(i, n, base, len, __off, STEP) { \ argument 100 left = (STEP); \
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/openbmc/linux/drivers/block/ |
H A D | swim.c | 94 #define STEP 0x071 macro 371 swim_action(base, STEP); in swim_step() 379 if (!swim_readbit(base, STEP)) in swim_step()
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H A D | swim3.c | 134 #define STEP 1 macro 397 swim3_select(fs, STEP); in seek_track()
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/openbmc/qemu/hw/timer/ |
H A D | ibex_timer.c | 43 FIELD(CFG0, STEP, 16, 8)
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/openbmc/linux/drivers/scsi/aic7xxx/ |
H A D | aic7xxx_reg_print.c_shipped | 261 { "STEP", 0x04, 0x04 },
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H A D | aic79xx_reg_print.c_shipped | 581 { "STEP", 0x04, 0x04 },
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H A D | aic7xxx_reg.h_shipped | 549 #define STEP 0x04
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H A D | aic79xx_reg.h_shipped | 1467 #define STEP 0x04
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H A D | aic7xxx.reg | 616 field STEP 0x04
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H A D | aic79xx_core.c | 3495 ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) | STEP); in ahd_clear_critical_section() 3515 ahd_outb(ahd, SEQCTL0, ahd_inb(ahd, SEQCTL0) & ~STEP); in ahd_clear_critical_section()
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H A D | aic79xx.reg | 3407 field STEP 0x04
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H A D | aic7xxx_core.c | 2035 ahc_outb(ahc, SEQCTL, ahc->seqctl | STEP); in ahc_clear_critical_section()
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/openbmc/linux/drivers/scsi/aic94xx/ |
H A D | aic94xx_reg_def.h | 311 #define STEP 0x00000002 macro
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