| /openbmc/linux/arch/x86/crypto/ |
| H A D | sha256_ni_asm.S | 66 #define STATE0 %xmm1 macro
111 movdqu 0*16(DIGEST_PTR), STATE0
114 pshufd $0xB1, STATE0, STATE0 /* CDAB */
116 movdqa STATE0, MSGTMP4
117 palignr $8, STATE1, STATE0 /* ABEF */
125 movdqa STATE0, ABEF_SAVE
133 sha256rnds2 STATE0, STATE1
135 sha256rnds2 STATE1, STATE0
142 sha256rnds2 STATE0, STATE1
144 sha256rnds2 STATE1, STATE0
[all …]
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| H A D | aegis128-aesni-asm.S | 13 #define STATE0 %xmm0 macro
56 aesenc STATE0, STATE4
57 aesenc STATE1, STATE0
199 movdqa T1, STATE0
214 aegis128_update; pxor KEY, STATE0
219 aegis128_update; pxor T1, STATE0
222 movdqu STATE0, 0x00(STATEP)
243 movdqu 0x00(STATEP), STATE0
285 pxor MSG, STATE0
325 pxor MSG, STATE0
[all …]
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| /openbmc/linux/drivers/gpu/drm/radeon/ |
| H A D | btcd.h | 91 #define STATE0(x) ((x) << 0) macro
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| H A D | rv6xxd.h | 187 # define STATE0(x) ((x) << 0) macro
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| H A D | rv770d.h | 291 #define STATE0(x) ((x) << 0) macro
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| H A D | btc_dpm.c | 1778 WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK); in btc_set_arb0_registers()
1822 WREG32_P(MC_ARB_BURST_TIME, STATE0(val), ~STATE0_MASK); in btc_set_ulv_dram_timing()
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| H A D | nid.h | 765 #define STATE0(x) ((x) << 0) macro
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| H A D | sid.h | 516 #define STATE0(x) ((x) << 0) macro
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| H A D | cikd.h | 641 #define STATE0(x) ((x) << 0) macro
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| H A D | evergreend.h | 277 #define STATE0(x) ((x) << 0) macro
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| H A D | rv6xx_dpm.c | 810 sqm_ratio = (STATE0(64 * high_clock / pi->hw.sclks[R600_POWER_LEVEL_LOW]) | in rv6xx_program_memory_timing_parameters()
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| H A D | rv770_dpm.c | 758 STATE0(64 * high_clock / pi->boot_sclk) | in rv770_program_memory_timing_parameters()
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| H A D | ni_dpm.c | 1541 WREG32_P(MC_ARB_BURST_TIME, STATE0(burst_time), ~STATE0_MASK); in ni_copy_and_switch_arb_sets()
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| /openbmc/u-boot/drivers/video/tegra124/ |
| H A D | sor.c | 319 tegra_sor_writel(sor, STATE0, 0); in tegra_dc_sor_update()
320 tegra_sor_writel(sor, STATE0, 1); in tegra_dc_sor_update()
321 tegra_sor_writel(sor, STATE0, 0); in tegra_dc_sor_update()
542 DUMP_REG(STATE0); in dump_sor_reg()
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| H A D | sor.h | 24 #define STATE0 0x3 macro
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| /openbmc/linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sid.h | 517 #define STATE0(x) ((x) << 0) macro
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| /openbmc/qemu/target/arm/ |
| H A D | cpu.h | 2115 FIELD(ID_PFR0, STATE0, 0, 4)
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/ |
| H A D | iceland_smumgr.c | 1602 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in iceland_populate_memory_timing_parameters()
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| H A D | polaris10_smumgr.c | 1480 burst_time = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in polaris10_populate_memory_timing_parameters()
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| H A D | ci_smumgr.c | 1641 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in ci_populate_memory_timing_parameters()
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| H A D | tonga_smumgr.c | 1477 burstTime = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in tonga_populate_memory_timing_parameters()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu7_hwmgr.c | 525 burst_time = PHM_READ_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0); in smu7_copy_and_switch_arb_sets()
540 PHM_WRITE_FIELD(hwmgr->device, MC_ARB_BURST_TIME, STATE0, burst_time); in smu7_copy_and_switch_arb_sets()
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| /openbmc/linux/drivers/gpu/drm/amd/pm/legacy-dpm/ |
| H A D | si_dpm.c | 3113 WREG32_P(MC_ARB_BURST_TIME, STATE0(burst_time), ~STATE0_MASK); in ni_copy_and_switch_arb_sets()
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