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Searched refs:SSCG_PLL_PLL3_CLKE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c144 pll_clke = SSCG_PLL_PLL3_CLKE_MASK; in decode_sscg_pll()
738 val_cfg0 = SSCG_PLL_PLL3_CLKE_MASK | SSCG_PLL_LOCK_SEL_MASK | in sscg_pll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h546 #define SSCG_PLL_PLL3_CLKE_MASK BIT(9) macro