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Searched refs:SSCG_PLL_DRAM_PLL_CLKE_MASK (Results 1 – 2 of 2) sorted by relevance

/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c140 pll_clke = SSCG_PLL_DRAM_PLL_CLKE_MASK; in decode_sscg_pll()
640 setbits_le32(pll_control_reg, SSCG_PLL_DRAM_PLL_CLKE_MASK); in dram_pll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h545 #define SSCG_PLL_DRAM_PLL_CLKE_MASK BIT(9) macro