Home
last modified time | relevance | path

Searched refs:SSCG_PLL_BYPASS2_MASK (Results 1 – 3 of 3) sorted by relevance

/openbmc/linux/drivers/clk/imx/
H A Dclk-sscg-pll.c66 #define SSCG_PLL_BYPASS2_MASK BIT(4) macro
105 if (!(val & SSCG_PLL_BYPASS2_MASK)) in clk_sscg_pll_wait_lock()
344 if (val & SSCG_PLL_BYPASS2_MASK) { in clk_sscg_pll_recalc_rate()
391 if (val & SSCG_PLL_BYPASS2_MASK) in clk_sscg_pll_get_parent()
/openbmc/u-boot/arch/arm/mach-imx/imx8m/
H A Dclock.c221 (pll_cfg0 & SSCG_PLL_BYPASS2_MASK)) in decode_sscg_pll()
582 setbits_le32(pll_control_reg, SSCG_PLL_BYPASS2_MASK); in dram_pll_init()
645 clrbits_le32(pll_control_reg, SSCG_PLL_BYPASS2_MASK); in dram_pll_init()
/openbmc/u-boot/arch/arm/include/asm/arch-imx8m/
H A Dclock.h549 #define SSCG_PLL_BYPASS2_MASK BIT(4) macro