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Searched refs:SRST_CORE0 (Results 1 – 22 of 22) sorted by relevance

/openbmc/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h98 #define SRST_CORE0 0 macro
H A Drk3128-cru.h101 #define SRST_CORE0 0 macro
H A Drk3228-cru.h106 #define SRST_CORE0 4 macro
H A Drk3188-cru-common.h133 #define SRST_CORE0 3 macro
H A Drk3288-cru.h193 #define SRST_CORE0 0 macro
H A Drk3328-cru.h211 #define SRST_CORE0 4 macro
/openbmc/linux/include/dt-bindings/clock/
H A Drk3036-cru.h100 #define SRST_CORE0 0 macro
H A Drk3188-cru-common.h139 #define SRST_CORE0 3 macro
H A Drk3128-cru.h154 #define SRST_CORE0 4 macro
H A Drk3228-cru.h156 #define SRST_CORE0 4 macro
H A Dpx30-cru.h205 #define SRST_CORE0 4 macro
H A Drk3308-cru.h224 #define SRST_CORE0 4 macro
H A Drk3328-cru.h211 #define SRST_CORE0 4 macro
H A Drk3288-cru.h201 #define SRST_CORE0 0 macro
H A Drockchip,rv1126-cru.h394 #define SRST_CORE0 4 macro
/openbmc/u-boot/arch/arm/dts/
H A Drk3036.dtsi55 resets = <&cru SRST_CORE0>;
H A Drk322x.dtsi35 resets = <&cru SRST_CORE0>;
H A Drk3288.dtsi80 resets = <&cru SRST_CORE0>;
/openbmc/linux/arch/arm/boot/dts/rockchip/
H A Drk3188.dtsi29 resets = <&cru SRST_CORE0>;
H A Drk3036.dtsi41 resets = <&cru SRST_CORE0>;
H A Drk322x.dtsi32 resets = <&cru SRST_CORE0>;
H A Drk3288.dtsi61 resets = <&cru SRST_CORE0>;