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Searched refs:SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h9316 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK 0x00f00000L macro
H A Dgfx_7_2_sh_mask.h11907 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK 0xf00000 macro
H A Dgfx_8_1_sh_mask.h14151 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK 0xf00000 macro
H A Dgfx_8_0_sh_mask.h13753 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK 0xf00000 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h21693 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_9_1_sh_mask.h23004 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_9_2_1_sh_mask.h22971 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_9_4_3_sh_mask.h25166 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_9_4_2_sh_mask.h16786 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_11_0_0_sh_mask.h31952 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_10_1_0_sh_mask.h31627 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_11_0_3_sh_mask.h34450 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro
H A Dgc_10_3_0_sh_mask.h29987 #define SQ_PERFCOUNTER3_SELECT__SPM_MODE_MASK … macro