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Searched refs:SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK (Results 1 – 11 of 11) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_8_1_sh_mask.h13961 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK 0x4 macro
H A Dgfx_8_0_sh_mask.h13563 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK 0x4 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h2185 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_9_1_sh_mask.h2033 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_9_2_1_sh_mask.h2056 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_9_4_3_sh_mask.h2194 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_9_4_2_sh_mask.h25477 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_11_0_0_sh_mask.h7061 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_10_1_0_sh_mask.h7737 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_11_0_3_sh_mask.h7918 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro
H A Dgc_10_3_0_sh_mask.h8072 #define SQ_DSM_CNTL__SPI_BACKPRESSURE_0_MASK … macro