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Searched refs:SPR_PIR (Results 1 – 8 of 8) sorted by relevance

/openbmc/qemu/hw/intc/
H A Dxive2.c278 uint32_t pir = env->spr_cb[SPR_PIR].default_value; in xive2_tctx_save_ctx()
345 uint32_t pir = env->spr_cb[SPR_PIR].default_value; in xive2_tctx_hw_cam_line()
516 uint32_t pir = env->spr_cb[SPR_PIR].default_value; in xive2_tctx_restore_os_ctx()
H A Dxive.c1657 uint32_t pir = env->spr_cb[SPR_PIR].default_value; in xive_tctx_hw_cam_line()
/openbmc/qemu/hw/ppc/
H A Dspapr_cpu_core.c273 env->spr_cb[SPR_PIR].default_value = cs->cpu_index; in spapr_realize_vcpu()
H A Dpnv_core.c303 ppc_spr_t *pir_spr = &env->spr_cb[SPR_PIR]; in pnv_core_cpu_realize()
H A Dppc.c1519 return env->spr_cb[SPR_PIR].default_value; in ppc_cpu_pir()
/openbmc/qemu/target/ppc/
H A Dcpu.h2270 #define SPR_PIR (0x3FF) macro
H A Dcpu_init.c272 spr_register(env, SPR_PIR, "PIR", in register_604_sprs()
589 spr_register(env, SPR_PIR, "PIR", in register_74xx_sprs()
5441 spr_register_hv(env, SPR_PIR, "PIR", in register_book3s_ids_sprs()
H A Dtranslate.c1013 gen_store_spr(SPR_PIR, t0); in spr_write_pir()