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Searched refs:SPR_Exxx_L1CSR0 (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dcpu.h2225 #define SPR_Exxx_L1CSR0 (0x3F2) macro
H A Dtranslate.c4447 gen_load_spr(t0, SPR_Exxx_L1CSR0); in gen_dcbtls()
4449 gen_store_spr(SPR_Exxx_L1CSR0, t0); in gen_dcbtls()
H A Dcpu_init.c2701 spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0", in init_proc_e200()
2962 spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0", in init_proc_e500()