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Searched refs:SPR_DBAT0U (Results 1 – 4 of 4) sorted by relevance

/openbmc/qemu/target/ppc/
H A Dmachine.c136 env->spr[SPR_DBAT0U + 2 * i] = env->DBAT[0][i]; in cpu_pre_save()
137 env->spr[SPR_DBAT0U + 2 * i + 1] = env->DBAT[1][i]; in cpu_pre_save()
245 env->DBAT[0][i] = env->spr[SPR_DBAT0U + 2 * i]; in cpu_post_load()
246 env->DBAT[1][i] = env->spr[SPR_DBAT0U + 2 * i + 1]; in cpu_post_load()
H A Dhelper_regs.c620 spr_register(env, SPR_DBAT0U, "DBAT0U", in register_low_BATs()
H A Dcpu.h1913 #define SPR_DBAT0U (0x218) macro
H A Dtranslate.c847 DBAT[sprn & 1][(sprn - SPR_DBAT0U) / 2])); in spr_read_dbat()
859 TCGv_i32 t0 = tcg_constant_i32((sprn - SPR_DBAT0U) / 2); in spr_write_dbatu()