Home
last modified time | relevance | path

Searched refs:SPR_40x_TSR (Results 1 – 3 of 3) sorted by relevance

/openbmc/qemu/hw/ppc/
H A Dppc.c1213 env->spr[SPR_40x_TSR] |= 1 << 26; in cpu_4xx_fit_cb()
1218 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_fit_cb()
1258 env->spr[SPR_40x_TSR] |= 1 << 27; in cpu_4xx_pit_cb()
1265 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR], in cpu_4xx_pit_cb()
1299 trace_ppc4xx_wdt(env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR]); in cpu_4xx_wdt_cb()
1300 switch ((env->spr[SPR_40x_TSR] >> 30) & 0x3) { in cpu_4xx_wdt_cb()
1305 env->spr[SPR_40x_TSR] |= 1U << 31; in cpu_4xx_wdt_cb()
1310 env->spr[SPR_40x_TSR] |= 1 << 30; in cpu_4xx_wdt_cb()
1316 env->spr[SPR_40x_TSR] &= ~0x30000000; in cpu_4xx_wdt_cb()
1317 env->spr[SPR_40x_TSR] |= env->spr[SPR_40x_TCR] & 0x30000000; in cpu_4xx_wdt_cb()
[all …]
/openbmc/qemu/target/ppc/
H A Dcpu.h2205 #define SPR_40x_TSR (0x3D8) macro
H A Dcpu_init.c1139 spr_register(env, SPR_40x_TSR, "TSR", in register_40x_sprs()
7658 env->spr[SPR_40x_TCR], env->spr[SPR_40x_TSR], in ppc_cpu_dump_state()