Searched refs:SPRN_TSR (Results 1 – 13 of 13) sorted by relevance
| /openbmc/linux/arch/powerpc/platforms/85xx/ |
| H A D | smp.c | 127 mtspr(SPRN_TSR, mfspr(SPRN_TSR)); in smp_85xx_cpu_offline_self()
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| /openbmc/u-boot/arch/powerpc/cpu/mpc85xx/ |
| H A D | interrupts.c | 98 mtspr(SPRN_TSR, TSR_PIS); in timer_interrupt_cpu()
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| H A D | cpu.c | 355 mtspr(SPRN_TSR, TSR_WIS); in reset_85xx_watchdog()
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| /openbmc/linux/arch/powerpc/kvm/ |
| H A D | booke_emulate.c | 261 case SPRN_TSR: in kvmppc_booke_emulate_mtspr()
442 case SPRN_TSR: in kvmppc_booke_emulate_mfspr()
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| /openbmc/linux/drivers/watchdog/ |
| H A D | booke_wdt.c | 126 mtspr(SPRN_TSR, TSR_ENW|TSR_WIS); in __booke_wdt_ping()
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| /openbmc/linux/arch/powerpc/include/asm/ |
| H A D | reg_booke.h | 202 #define SPRN_TSR 0x150 /* Timer Status Register */ macro
209 #define SPRN_TSR 0x3D8 /* Timer Status Register */ macro
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| /openbmc/u-boot/arch/powerpc/include/asm/ |
| H A D | processor.h | 412 #define SPRN_TSR 0x3D8 /* Timer Status Register */ macro
414 #define SPRN_TSR 0x150 /* Book E Timer Status Register */ macro
685 #define TSR SPRN_TSR /* Timer Status Register */
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| /openbmc/linux/arch/powerpc/kernel/ |
| H A D | swsusp_asm64.S | 242 mtspr SPRN_TSR, r0
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| H A D | swsusp_85xx.S | 186 mtspr SPRN_TSR,r4
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| H A D | exceptions-64e.S | 434 mtspr SPRN_TSR,r
437 mtspr SPRN_TSR,r
1505 mfspr r3,SPRN_TSR
1506 mtspr SPRN_TSR,r3
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| H A D | time.c | 680 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); in start_cpu_decrementer()
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| H A D | head_40x.S | 519 mtspr SPRN_TSR,r0 /* Clear the PIT exception */
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| H A D | head_booke.h | 511 mtspr SPRN_TSR,r0; /* Clear the DEC interrupt */ \
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