Searched refs:SPRN_TRIG2 (Results 1 – 3 of 3) sorted by relevance
337 instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0); in do_uaccess_flush_fixups()375 instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0); in __do_entry_flush_fixups()460 instrs[i++] = PPC_RAW_MTSPR(SPRN_TRIG2, _R0); in __do_rfi_flush_fixups()
404 #define SPRN_TRIG2 0x372 macro
4656 (ori 30,30,0 or mtspr SPRN_TRIG2,rN), whether the L1 data cache is set