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Searched refs:SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32__SHIFT (Results 1 – 4 of 4) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h24932 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32__SHIFT … macro
H A Dgc_10_1_0_sh_mask.h20132 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32__SHIFT … macro
H A Dgc_11_0_3_sh_mask.h27409 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h18287 #define SPI_SHADER_RSRC_LIMIT_CTRL__VGPR_PER_SIMD32__SHIFT … macro