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Searched refs:SPI_REG (Results 1 – 6 of 6) sorted by relevance

/openbmc/u-boot/board/keymile/km_arm/
H A Dfpga_config.c79 #define SPI_REG 0x06 macro
94 ret = i2c_read(BOCO_ADDR, SPI_REG, 1, &regval, 1); in fpga_done()
97 __func__, SPI_REG); in fpga_done()
123 ret = boco_clear_bits(SPI_REG, CFG_EEPROM); in trigger_fpga_config()
128 ret = boco_clear_bits(SPI_REG, FPGA_PROG | FPGA_INIT_B); in trigger_fpga_config()
136 ret = boco_set_bits(SPI_REG, FPGA_PROG); in trigger_fpga_config()
141 ret = boco_set_bits(SPI_REG, FPGA_INIT_B); in trigger_fpga_config()
173 ret = i2c_read(BOCO_ADDR, SPI_REG, 1, &spictrl, 1); in wait_for_fpga_config()
259 ret = boco_set_bits(SPI_REG, CFG_EEPROM); in toggle_eeprom_spi_bus()
/openbmc/u-boot/drivers/spi/
H A Dspi-sunxi.c77 #define SPI_REG(priv, reg) ((priv)->base + \ macro
145 byte = readb(SPI_REG(priv, SPI_RXD)); in sun4i_spi_drain_fifo()
157 writeb(byte, SPI_REG(priv, SPI_TXD)); in sun4i_spi_fill_fifo()
166 reg = readl(SPI_REG(priv, SPI_TCR)); in sun4i_spi_set_cs()
176 writel(reg, SPI_REG(priv, SPI_TCR)); in sun4i_spi_set_cs()
310 setbits_le32(SPI_REG(priv, SPI_GCR), SUN4I_CTL_ENABLE | in sun4i_spi_claim_bus()
314 setbits_le32(SPI_REG(priv, SPI_GCR), in sun4i_spi_claim_bus()
317 setbits_le32(SPI_REG(priv, SPI_TCR), SPI_BIT(priv, SPI_TCR_CS_MANUAL) | in sun4i_spi_claim_bus()
327 clrbits_le32(SPI_REG(priv, SPI_GCR), SUN4I_CTL_ENABLE); in sun4i_spi_release_bus()
358 setbits_le32(SPI_REG(priv, SPI_FCR), SPI_BIT(priv, SPI_FCR_RF_RST) | in sun4i_spi_xfer()
[all …]
/openbmc/u-boot/arch/x86/cpu/broadwell/
H A Dlpc.c23 writel(0x1000, SPI_REG(SPIBAR_FDOC)); in set_spi_speed()
26 fdod = readl(SPI_REG(SPIBAR_FDOD)); in set_spi_speed()
31 ssfc = readb(SPI_REG(SPIBAR_SSFC + 2)); in set_spi_speed()
34 writeb(ssfc, SPI_REG(SPIBAR_SSFC + 2)); in set_spi_speed()
H A Dpch.c297 clrbits_le32(SPI_REG(SPIBAR_FDOC), 0x00007ffc); in pch_read_soft_strap()
298 setbits_le32(SPI_REG(SPIBAR_FDOC), 0x00004000 | id * 4); in pch_read_soft_strap()
300 return readl(SPI_REG(SPIBAR_FDOD)); in pch_read_soft_strap()
/openbmc/linux/sound/pci/ca0106/
H A Dca0106_main.c1346 #define SPI_REG(reg, value) (((reg) << SPI_REG_SHIFT) | (value)) macro
1348 SPI_REG(SPI_LDA1_REG, SPI_DA_BIT_0dB), /* 0dB dig. attenuation */
1349 SPI_REG(SPI_RDA1_REG, SPI_DA_BIT_0dB),
1350 SPI_REG(SPI_PL_REG, SPI_PL_BIT_L_L | SPI_PL_BIT_R_R | SPI_IZD_BIT),
1351 SPI_REG(SPI_FMT_REG, SPI_FMT_BIT_I2S | SPI_IWL_BIT_24),
1352 SPI_REG(SPI_LDA2_REG, SPI_DA_BIT_0dB),
1353 SPI_REG(SPI_RDA2_REG, SPI_DA_BIT_0dB),
1354 SPI_REG(SPI_LDA3_REG, SPI_DA_BIT_0dB),
1355 SPI_REG(SPI_RDA3_REG, SPI_DA_BIT_0dB),
1356 SPI_REG(SPI_MASTDA_REG, SPI_DA_BIT_0dB),
[all …]
/openbmc/u-boot/arch/x86/include/asm/arch-broadwell/
H A Dspi.h17 #define SPI_REG(x) (RCB_REG(SPIBAR_OFFSET + (x))) macro