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Searched refs:SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7930 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK 0x00000300L macro
H A Dgfx_7_2_sh_mask.h8607 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK 0x300 macro
H A Dgfx_8_1_sh_mask.h10567 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK 0x300 macro
H A Dgfx_8_0_sh_mask.h10169 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK 0x300 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16193 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_9_1_sh_mask.h17502 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_9_2_1_sh_mask.h17377 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_9_4_3_sh_mask.h19676 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_9_4_2_sh_mask.h9626 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_11_0_0_sh_mask.h21373 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_10_1_0_sh_mask.h23698 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_11_0_3_sh_mask.h23703 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro
H A Dgc_10_3_0_sh_mask.h21863 #define SPI_PS_INPUT_CNTL_28__DEFAULT_VAL_MASK macro