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Searched refs:SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK (Results 1 – 13 of 13) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gca/
H A Dgfx_6_0_sh_mask.h7598 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK 0x000000e0L macro
H A Dgfx_7_2_sh_mask.h8711 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK 0xe0 macro
H A Dgfx_8_1_sh_mask.h10711 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK 0xe0 macro
H A Dgfx_8_0_sh_mask.h10313 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK 0xe0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_0_sh_mask.h16340 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_9_1_sh_mask.h17649 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_9_2_1_sh_mask.h17524 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_9_4_3_sh_mask.h19823 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_9_4_2_sh_mask.h9773 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_11_0_0_sh_mask.h21536 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_10_1_0_sh_mask.h23847 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_11_0_3_sh_mask.h23866 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro
H A Dgc_10_3_0_sh_mask.h22021 #define SPI_INTERP_CONTROL_0__PNT_SPRITE_OVRD_Y_MASK macro