| /openbmc/linux/arch/mips/mm/ |
| H A D | uasm-mips.c | 51 [insn_addiu] = {M(addiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
68 [insn_cache] = {M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
76 [insn_daddiu] = {M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
120 [insn_lb] = {M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
121 [insn_lbu] = {M(lbu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
122 [insn_ld] = {M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
126 [insn_lh] = {M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
127 [insn_lhu] = {M(lhu_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
129 [insn_ll] = {M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
130 [insn_lld] = {M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM},
[all …]
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| H A D | uasm-micromips.c | 44 [insn_addiu] = {M(mm_addiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
54 [insn_cache] = {M(mm_pool32b_op, 0, 0, mm_cache_func, 0, 0), RT | RS | SIMM},
80 [insn_lb] = {M(mm_lb32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
82 [insn_lh] = {M(mm_lh32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
83 [insn_ll] = {M(mm_pool32c_op, 0, 0, (mm_ll_func << 1), 0, 0), RS | RT | SIMM},
85 [insn_lui] = {M(mm_pool32i_op, mm_lui_op, 0, 0, 0, 0), RS | SIMM},
86 [insn_lw] = {M(mm_lw32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
96 [insn_pref] = {M(mm_pool32c_op, 0, 0, (mm_pref_func << 1), 0, 0), RT | RS | SIMM},
98 [insn_sc] = {M(mm_pool32c_op, 0, 0, (mm_sc_func << 1), 0, 0), RT | RS | SIMM},
104 [insn_sltiu] = {M(mm_sltiu32_op, 0, 0, 0, 0, 0), RT | RS | SIMM},
[all …]
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| H A D | uasm.c | 21 SIMM = 0x010, enumerator
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| /openbmc/qemu/target/ppc/ |
| H A D | internal.h | 136 EXTRACT_SHELPER(SIMM, 0, 16);
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| H A D | translate.c | 2479 target_long simm = SIMM(ctx->opcode); in gen_addr_imm_index()
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| /openbmc/qemu/target/mips/tcg/ |
| H A D | micromips_translate.c.inc | 632 #define SIMM(op, start, width) \
675 int imm = SIMM(ctx->opcode, 1, 4);
1847 gen_ldst_pair(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12));
1858 gen_ldst_multiple(ctx, minor, rt, rs, SIMM(ctx->opcode, 0, 12));
2856 offset = SIMM(ctx->opcode, 0, 23) << 2;
3076 int16_t offset = SIMM(ctx->opcode, 0, 7) << 2;
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| /openbmc/linux/arch/powerpc/xmon/ |
| H A D | ppc-opc.c | 746 #define SIMM VD + 1 macro
747 #define TE SIMM
751 #define UIMM SIMM + 1
3304 {"evsplati", VX (4, 553), VX_MASK, PPCSPE, 0, {RS, SIMM}},
3306 {"evsplatfi", VX (4, 555), VX_MASK, PPCSPE, 0, {RS, SIMM}},
3441 {"vspltisb", VX (4, 780), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
3483 {"vspltish", VX (4, 844), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
3499 {"vspltisw", VX (4, 908), VXVB_MASK, PPCVEC, 0, {VD, SIMM}},
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| /openbmc/linux/Documentation/admin-guide/ |
| H A D | ras.rst | 333 packaging alternatives, like SO-DIMM, SIMM, etc. The UEFI
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| H A D | devices.txt | 315 178 = /dev/jsflash JavaStation OS flash SIMM
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| /openbmc/qemu/tests/functional/acpi-bits/bits-tests/ |
| H A D | smbios.py2 | 1162 0x03: 'SIMM',
|