Searched refs:SIFIVE_E_DEV_DEBUG (Results 1 – 2 of 2) sorted by relevance
| /openbmc/qemu/include/hw/riscv/ | ||
| H A D | sifive_e.h | 59 SIFIVE_E_DEV_DEBUG, enumerator |
| /openbmc/qemu/hw/riscv/ | ||
| H A D | sifive_e.c | 52 [SIFIVE_E_DEV_DEBUG] = { 0x0, 0x1000 }, |