Searched refs:SGMII_PWR_PLL_CTRL_REG (Results 1 – 2 of 2) sorted by relevance
832 reg_write(SGMII_PWR_PLL_CTRL_REG(0), 0xF881); in serdes_phy_config()833 DEBUG_WR_REG(SGMII_PWR_PLL_CTRL_REG(0), 0xF881); in serdes_phy_config()873 reg_write(SGMII_PWR_PLL_CTRL_REG(sgmii_port), 0xF881); in serdes_phy_config()874 DEBUG_WR_REG(SGMII_PWR_PLL_CTRL_REG(sgmii_port), 0xF881); in serdes_phy_config()
150 #define SGMII_PWR_PLL_CTRL_REG(port) (MV_ETH_REGS_BASE(port) + 0xE04) macro