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Searched refs:SDMA1_STATUS_REG__RB_CMD_IDLE_MASK (Results 1 – 12 of 12) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h512 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x00000010L macro
H A Dsdma1_4_2_sh_mask.h510 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
H A Dsdma1_4_2_2_sh_mask.h514 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1435 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10 macro
H A Doss_2_4_sh_mask.h1595 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10 macro
H A Doss_3_0_1_sh_mask.h2113 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10 macro
H A Doss_3_0_sh_mask.h2417 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK 0x10 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h3017 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_0_0_sh_mask.h2723 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
H A Dgc_10_1_0_sh_mask.h2992 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
H A Dgc_11_0_3_sh_mask.h2794 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro
H A Dgc_10_3_0_sh_mask.h3101 #define SDMA1_STATUS_REG__RB_CMD_IDLE_MASK … macro