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Searched refs:SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT (Results 1 – 10 of 10) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1662 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 macro
H A Dsdma1_4_2_sh_mask.h1670 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1678 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_2_0_sh_mask.h1764 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 macro
H A Doss_2_4_sh_mask.h1980 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 macro
H A Doss_3_0_1_sh_mask.h2956 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 macro
H A Doss_3_0_sh_mask.h3064 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT 0x4 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4286 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4230 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4413 #define SDMA1_RLC1_RB_WPTR_POLL_CNTL__FREQUENCY__SHIFT … macro