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Searched refs:SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT (Results 1 – 8 of 8) sorted by relevance

/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma1/
H A Dsdma1_4_0_sh_mask.h1603 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
H A Dsdma1_4_2_sh_mask.h1611 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT … macro
H A Dsdma1_4_2_2_sh_mask.h1619 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/oss/
H A Doss_3_0_1_sh_mask.h2910 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
H A Doss_3_0_sh_mask.h3024 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT 0x0 macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_sh_mask.h4221 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT … macro
/openbmc/linux/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_10_1_0_sh_mask.h4169 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT … macro
H A Dgc_10_3_0_sh_mask.h4346 #define SDMA1_RLC0_MIDCMD_DATA5__DATA5__SHIFT … macro